mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-09 11:25:55 +00:00
[ms-inline asm] Refactor the parsing of identifiers. No functional change
indended. Part of rdar://13663589 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179871 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -314,7 +314,7 @@ private:
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}
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}
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PrevState = CurrState;
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PrevState = CurrState;
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}
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}
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void onDispExpr(const MCExpr *SymRef, StringRef SymRefName) {
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void onIdentifierExpr(const MCExpr *SymRef, StringRef SymRefName) {
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PrevState = State;
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PrevState = State;
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switch (State) {
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switch (State) {
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default:
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default:
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@@ -494,8 +494,8 @@ private:
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X86Operand *ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End);
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X86Operand *ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End);
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X86Operand *ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
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X86Operand *ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
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int64_t ImmDisp, unsigned Size);
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int64_t ImmDisp, unsigned Size);
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X86Operand *ParseIntelVarWithQualifier(const MCExpr *&Disp,
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X86Operand *ParseIntelIdentifier(const MCExpr *&Val, StringRef &Identifier,
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StringRef &Identifier);
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SMLoc &End);
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X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
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X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
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X86Operand *CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
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X86Operand *CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
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@@ -1250,18 +1250,22 @@ X86AsmParser::ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End) {
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case AsmToken::Identifier: {
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case AsmToken::Identifier: {
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// This could be a register or a symbolic displacement.
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// This could be a register or a symbolic displacement.
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unsigned TmpReg;
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unsigned TmpReg;
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const MCExpr *Disp = 0;
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const MCExpr *Val;
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SMLoc IdentLoc = Tok.getLoc();
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SMLoc IdentLoc = Tok.getLoc();
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StringRef Identifier = Tok.getString();
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StringRef Identifier = Tok.getString();
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if(!ParseRegister(TmpReg, IdentLoc, End)) {
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if(!ParseRegister(TmpReg, IdentLoc, End)) {
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SM.onRegister(TmpReg);
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SM.onRegister(TmpReg);
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UpdateLocLex = false;
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UpdateLocLex = false;
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break;
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break;
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} else if (!getParser().parsePrimaryExpr(Disp, End)) {
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} else {
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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if (!isParsingInlineAsm()) {
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return Err;
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if (getParser().parsePrimaryExpr(Val, End))
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return ErrorOperand(Tok.getLoc(), "Unexpected identifier!");
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SM.onDispExpr(Disp, Identifier);
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} else {
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if (X86Operand *Err = ParseIntelIdentifier(Val, Identifier, End))
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return Err;
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}
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SM.onIdentifierExpr(Val, Identifier);
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UpdateLocLex = false;
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UpdateLocLex = false;
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break;
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break;
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}
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}
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@@ -1354,25 +1358,23 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start,
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}
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}
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// Inline assembly may use variable names with namespace alias qualifiers.
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// Inline assembly may use variable names with namespace alias qualifiers.
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X86Operand *X86AsmParser::ParseIntelVarWithQualifier(const MCExpr *&Disp,
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X86Operand *X86AsmParser::ParseIntelIdentifier(const MCExpr *&Val,
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StringRef &Identifier) {
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StringRef &Identifier,
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// We should only see Foo::Bar if we're parsing inline assembly.
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SMLoc &End) {
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if (!isParsingInlineAsm())
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assert (isParsingInlineAsm() && "Expected to be parsing inline assembly.");
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return 0;
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Val = 0;
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// If we don't see a ':' then there can't be a qualifier.
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if (getLexer().isNot(AsmToken::Colon))
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return 0;
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bool Done = false;
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bool Done = false;
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const AsmToken &Tok = Parser.getTok();
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const AsmToken &Tok = Parser.getTok();
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AsmToken IdentEnd = Tok;
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AsmToken IdentEnd = Tok;
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while (!Done) {
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while (!Done) {
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End = Tok.getLoc();
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switch (getLexer().getKind()) {
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switch (getLexer().getKind()) {
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default:
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default:
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Done = true;
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Done = true;
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break;
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break;
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case AsmToken::Colon:
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case AsmToken::Colon:
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IdentEnd = Tok;
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getLexer().Lex(); // Consume ':'.
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getLexer().Lex(); // Consume ':'.
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if (getLexer().isNot(AsmToken::Colon))
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if (getLexer().isNot(AsmToken::Colon))
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return ErrorOperand(Tok.getLoc(), "Expected ':' token!");
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return ErrorOperand(Tok.getLoc(), "Expected ':' token!");
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@@ -1391,7 +1393,7 @@ X86Operand *X86AsmParser::ParseIntelVarWithQualifier(const MCExpr *&Disp,
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Identifier = StringRef(Identifier.data(), Len + IdentEnd.getString().size());
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Identifier = StringRef(Identifier.data(), Len + IdentEnd.getString().size());
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MCSymbol *Sym = getContext().GetOrCreateSymbol(Identifier);
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MCSymbol *Sym = getContext().GetOrCreateSymbol(Identifier);
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MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None;
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MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None;
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Disp = MCSymbolRefExpr::Create(Sym, Variant, getParser().getContext());
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Val = MCSymbolRefExpr::Create(Sym, Variant, getParser().getContext());
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return 0;
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return 0;
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}
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}
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@@ -1435,18 +1437,18 @@ X86Operand *X86AsmParser::ParseIntelMemOperand(unsigned SegReg,
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return ParseIntelBracExpression(SegReg, Start, ImmDisp, Size);
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return ParseIntelBracExpression(SegReg, Start, ImmDisp, Size);
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}
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}
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const MCExpr *Disp = 0;
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const MCExpr *Val;
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if (!isParsingInlineAsm()) {
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if (getParser().parsePrimaryExpr(Val, End))
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return ErrorOperand(Tok.getLoc(), "Unexpected token!");
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return X86Operand::CreateMem(Val, Start, End, Size);
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}
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StringRef Identifier = Tok.getString();
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StringRef Identifier = Tok.getString();
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if (getParser().parsePrimaryExpr(Disp, End))
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if (X86Operand *Err = ParseIntelIdentifier(Val, Identifier, End))
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return 0;
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if (!isParsingInlineAsm())
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return X86Operand::CreateMem(Disp, Start, End, Size);
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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return Err;
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return Err;
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return CreateMemForInlineAsm(/*SegReg=*/0, Val, /*BaseReg=*/0,/*IndexReg=*/0,
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return CreateMemForInlineAsm(/*SegReg=*/0, Disp, /*BaseReg=*/0,/*IndexReg=*/0,
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/*Scale=*/1, Start, End, Size, Identifier);
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/*Scale=*/1, Start, End, Size, Identifier);
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}
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}
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@@ -1502,11 +1504,7 @@ X86Operand *X86AsmParser::ParseIntelOffsetOfOperator() {
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const MCExpr *Val;
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const MCExpr *Val;
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SMLoc Start = Tok.getLoc(), End;
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SMLoc Start = Tok.getLoc(), End;
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StringRef Identifier = Tok.getString();
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StringRef Identifier = Tok.getString();
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if (getParser().parsePrimaryExpr(Val, End))
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if (X86Operand *Err = ParseIntelIdentifier(Val, Identifier, End))
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return ErrorOperand(Start, "Unable to parse expression!");
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const MCExpr *Disp = 0;
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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return Err;
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return Err;
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// Don't emit the offset operator.
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// Don't emit the offset operator.
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@@ -1537,15 +1535,11 @@ X86Operand *X86AsmParser::ParseIntelOperator(unsigned OpKind) {
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SMLoc TypeLoc = Tok.getLoc();
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SMLoc TypeLoc = Tok.getLoc();
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Parser.Lex(); // Eat operator.
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Parser.Lex(); // Eat operator.
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const MCExpr *Val;
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const MCExpr *Val = 0;
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AsmToken StartTok = Tok;
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AsmToken StartTok = Tok;
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SMLoc Start = Tok.getLoc(), End;
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SMLoc Start = Tok.getLoc(), End;
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StringRef Identifier = Tok.getString();
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StringRef Identifier = Tok.getString();
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if (getParser().parsePrimaryExpr(Val, End))
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if (X86Operand *Err = ParseIntelIdentifier(Val, Identifier, End))
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return ErrorOperand(Start, "Unable to parse expression!");
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const MCExpr *Disp = 0;
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if (X86Operand *Err = ParseIntelVarWithQualifier(Disp, Identifier))
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return Err;
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return Err;
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unsigned Length = 0, Size = 0, Type = 0;
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unsigned Length = 0, Size = 0, Type = 0;
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