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[mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2.

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Differential Revision: http://reviews.llvm.org/D5800


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222352 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jozef Kolek
2014-11-19 13:23:58 +00:00
parent 5c6c7e3295
commit e4e84b22fe
2 changed files with 13 additions and 0 deletions
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7
test/CodeGen/Mips/micromips-addiu.ll
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@@ -3,6 +3,7 @@
@x = global i32 65504, align 4
@y = global i32 60929, align 4
@z = global i32 60929, align 4
@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
define i32 @main() nounwind {
@@ -16,6 +17,11 @@ entry:
%addiu2 = add i32 %1, 55
%call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds
([7 x i8]* @.str, i32 0, i32 0), i32 %addiu2)
%2 = load i32* @z, align 4
%addiu3 = add i32 %2, 24
%call3 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds
([7 x i8]* @.str, i32 0, i32 0), i32 %addiu3)
ret i32 0
}
@@ -23,3 +29,4 @@ declare i32 @printf(i8*, ...)
; CHECK: addius5 ${{[0-9]+}}, -7
; CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 55
; CHECK: addiur2 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, 24