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Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-08-11 06:59:12 +00:00
parent 8198fcfc5d
commit e4ead0ce62
2 changed files with 12 additions and 1 deletions
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7
lib/Target/X86/X86AsmPrinter.cpp
View File

@ -115,6 +115,10 @@ namespace {
} }
} }
void printCallOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT) {
printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
}
void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
MVT::ValueType VT) { MVT::ValueType VT) {
switch (VT) { switch (VT) {
@ -618,6 +622,9 @@ void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
if (printInstruction(MI)) if (printInstruction(MI))
return; // Printer was automatically generated return; // Printer was automatically generated
MI->dump();
abort();
unsigned Opcode = MI->getOpcode(); unsigned Opcode = MI->getOpcode();
const TargetInstrInfo &TII = *TM.getInstrInfo(); const TargetInstrInfo &TII = *TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode); const TargetInstrDescriptor &Desc = TII.get(Opcode);

6
lib/Target/X86/X86InstrInfo.td
View File

@ -29,6 +29,10 @@ def f32mem : X86MemOperand<f32>;
def f64mem : X86MemOperand<f64>; def f64mem : X86MemOperand<f64>;
def f80mem : X86MemOperand<f80>; def f80mem : X86MemOperand<f80>;
// PCRelative calls need special operand formatting.
let PrintMethod = "printCallOperand" in
def calltarget : Operand<i32>;
// Format specifies the encoding used by the instruction. This is part of the // Format specifies the encoding used by the instruction. This is part of the
// ad-hoc solution used to emit machine instruction encodings by our machine // ad-hoc solution used to emit machine instruction encodings by our machine
// code emitter. // code emitter.
@ -196,7 +200,7 @@ def JG : IBr<0x8F, (ops i32imm:$dst), "jg $dst">, TB;
let isCall = 1 in let isCall = 1 in
// All calls clobber the non-callee saved registers... // All calls clobber the non-callee saved registers...
let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6] in { let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6] in {
def CALLpcrel32 : X86Inst<"call", 0xE8, RawFrm, NoMem, NoImm>; // FIXME: 'call' doesn't allow 'OFFSET' def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst">;
def CALL32r : I<0xFF, MRM2r, (ops R32:$dst), "call $dst">; def CALL32r : I<0xFF, MRM2r, (ops R32:$dst), "call $dst">;
def CALL32m : I<0xFF, MRM2m, (ops i32mem:$dst), "call $dst">; def CALL32m : I<0xFF, MRM2m, (ops i32mem:$dst), "call $dst">;
} }