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https://github.com/c64scene-ar/llvm-6502.git
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Don't crash on invalid instructions when disassembling MBlaze code.
This fixes http://llvm.org/bugs/show_bug.cgi?id=9653 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129303 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Wesley Peck
parent
cc88595bce
commit
e53060fdf4
@ -57,18 +57,26 @@ static unsigned mblazeBinary2Opcode[] = {
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};
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static unsigned getRD(uint32_t insn) {
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if (!MBlazeRegisterInfo::isRegister((insn>>21)&0x1F))
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return UNSUPPORTED;
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return MBlazeRegisterInfo::getRegisterFromNumbering((insn>>21)&0x1F);
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}
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static unsigned getRA(uint32_t insn) {
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if (!MBlazeRegisterInfo::getRegisterFromNumbering((insn>>16)&0x1F))
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return UNSUPPORTED;
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return MBlazeRegisterInfo::getRegisterFromNumbering((insn>>16)&0x1F);
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}
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static unsigned getRB(uint32_t insn) {
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if (!MBlazeRegisterInfo::getRegisterFromNumbering((insn>>11)&0x1F))
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return UNSUPPORTED;
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return MBlazeRegisterInfo::getRegisterFromNumbering((insn>>11)&0x1F);
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}
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static int64_t getRS(uint32_t insn) {
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if (!MBlazeRegisterInfo::isSpecialRegister(insn&0x3FFF))
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return UNSUPPORTED;
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return MBlazeRegisterInfo::getSpecialRegisterFromNumbering(insn&0x3FFF);
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}
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@ -489,13 +497,14 @@ bool MBlazeDisassembler::getInstruction(MCInst &instr,
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raw_ostream &vStream) const {
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// The machine instruction.
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uint32_t insn;
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uint64_t read;
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uint8_t bytes[4];
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// We always consume 4 bytes of data
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size = 4;
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// By default we consume 1 byte on failure
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size = 1;
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// We want to read exactly 4 bytes of data.
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if (region.readBytes(address, 4, (uint8_t*)bytes, NULL) == -1)
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if (region.readBytes(address, 4, (uint8_t*)bytes, &read) == -1 || read < 4)
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return false;
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// Encoded as a big-endian 32-bit word in the stream.
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@ -509,44 +518,63 @@ bool MBlazeDisassembler::getInstruction(MCInst &instr,
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instr.setOpcode(opcode);
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unsigned RD = getRD(insn);
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unsigned RA = getRA(insn);
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unsigned RB = getRB(insn);
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unsigned RS = getRS(insn);
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uint64_t tsFlags = MBlazeInsts[opcode].TSFlags;
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switch ((tsFlags & MBlazeII::FormMask)) {
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default: llvm_unreachable("unknown instruction encoding");
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default:
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return false;
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case MBlazeII::FRRRR:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED || RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RB));
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instr.addOperand(MCOperand::CreateReg(RA));
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break;
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case MBlazeII::FRRR:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED || RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RA));
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instr.addOperand(MCOperand::CreateReg(RB));
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break;
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case MBlazeII::FRI:
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switch (opcode) {
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default: llvm_unreachable("unknown instruction encoding");
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default:
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return false;
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case MBlaze::MFS:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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if (RD == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateImm(insn&0x3FFF));
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break;
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case MBlaze::MTS:
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if (RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateImm(insn&0x3FFF));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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instr.addOperand(MCOperand::CreateReg(RA));
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break;
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case MBlaze::MSRSET:
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case MBlaze::MSRCLR:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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if (RD == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateImm(insn&0x7FFF));
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break;
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}
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break;
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case MBlazeII::FRRI:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RA));
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switch (opcode) {
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default:
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instr.addOperand(MCOperand::CreateImm(getIMM(insn)));
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@ -560,27 +588,37 @@ bool MBlazeDisassembler::getInstruction(MCInst &instr,
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break;
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case MBlazeII::FCRR:
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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if (RA == UNSUPPORTED || RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RA));
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instr.addOperand(MCOperand::CreateReg(RB));
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break;
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case MBlazeII::FCRI:
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RA));
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instr.addOperand(MCOperand::CreateImm(getIMM(insn)));
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break;
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case MBlazeII::FRCR:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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if (RD == UNSUPPORTED || RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RB));
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break;
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case MBlazeII::FRCI:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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if (RD == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateImm(getIMM(insn)));
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break;
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case MBlazeII::FCCR:
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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if (RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RB));
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break;
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case MBlazeII::FCCI:
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@ -588,33 +626,45 @@ bool MBlazeDisassembler::getInstruction(MCInst &instr,
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break;
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case MBlazeII::FRRCI:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RA));
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instr.addOperand(MCOperand::CreateImm(getSHT(insn)));
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break;
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case MBlazeII::FRRC:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RA));
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break;
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case MBlazeII::FRCX:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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if (RD == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateImm(getFSL(insn)));
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break;
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case MBlazeII::FRCS:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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instr.addOperand(MCOperand::CreateReg(getRS(insn)));
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if (RD == UNSUPPORTED || RS == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateReg(RS));
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break;
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case MBlazeII::FCRCS:
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instr.addOperand(MCOperand::CreateReg(getRS(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RS == UNSUPPORTED || RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RS));
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instr.addOperand(MCOperand::CreateReg(RA));
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break;
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case MBlazeII::FCRCX:
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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if (RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RA));
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instr.addOperand(MCOperand::CreateImm(getFSL(insn)));
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break;
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@ -623,16 +673,23 @@ bool MBlazeDisassembler::getInstruction(MCInst &instr,
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break;
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case MBlazeII::FCR:
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instr.addOperand(MCOperand::CreateReg(getRB(insn)));
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if (RB == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RB));
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break;
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case MBlazeII::FRIR:
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instr.addOperand(MCOperand::CreateReg(getRD(insn)));
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if (RD == UNSUPPORTED || RA == UNSUPPORTED)
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return false;
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instr.addOperand(MCOperand::CreateReg(RD));
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instr.addOperand(MCOperand::CreateImm(getIMM(insn)));
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instr.addOperand(MCOperand::CreateReg(getRA(insn)));
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instr.addOperand(MCOperand::CreateReg(RA));
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break;
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}
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// We always consume 4 bytes of data on success
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size = 4;
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return true;
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}
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@ -181,6 +181,26 @@ unsigned MBlazeRegisterInfo::getSpecialRegisterFromNumbering(unsigned Reg) {
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return 0; // Not reached
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}
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bool MBlazeRegisterInfo::isRegister(unsigned Reg) {
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return Reg <= 31;
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}
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bool MBlazeRegisterInfo::isSpecialRegister(unsigned Reg) {
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switch (Reg) {
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case 0x0000 : case 0x0001 : case 0x0003 : case 0x0005 :
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case 0x0007 : case 0x000B : case 0x000D : case 0x1000 :
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case 0x1001 : case 0x1002 : case 0x1003 : case 0x1004 :
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case 0x2000 : case 0x2001 : case 0x2002 : case 0x2003 :
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case 0x2004 : case 0x2005 : case 0x2006 : case 0x2007 :
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case 0x2008 : case 0x2009 : case 0x200A : case 0x200B :
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return true;
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default:
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return false;
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}
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return false; // Not reached
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}
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unsigned MBlazeRegisterInfo::getPICCallReg() {
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return MBlaze::R20;
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}
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@ -45,6 +45,8 @@ struct MBlazeRegisterInfo : public MBlazeGenRegisterInfo {
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static unsigned getRegisterNumbering(unsigned RegEnum);
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static unsigned getRegisterFromNumbering(unsigned RegEnum);
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static unsigned getSpecialRegisterFromNumbering(unsigned RegEnum);
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static bool isRegister(unsigned RegEnum);
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static bool isSpecialRegister(unsigned RegEnum);
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/// Get PIC indirect call register
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static unsigned getPICCallReg();
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