From e54b482d1c6ec714a73d8a87a4f7583aa86fac9f Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 21 Sep 2010 05:43:34 +0000 Subject: [PATCH] Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations into non-segment-relative copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114402 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86SelectionDAGInfo.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/lib/Target/X86/X86SelectionDAGInfo.cpp b/lib/Target/X86/X86SelectionDAGInfo.cpp index 99a9cd5e646..c59d4074c7a 100644 --- a/lib/Target/X86/X86SelectionDAGInfo.cpp +++ b/lib/Target/X86/X86SelectionDAGInfo.cpp @@ -35,6 +35,10 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, MachinePointerInfo DstPtrInfo) const { ConstantSDNode *ConstantSize = dyn_cast(Size); + // If to a segment-relative address space, use the default lowering. + if (DstPtrInfo.getAddrSpace() >= 256) + return SDValue(); + // If not DWORD aligned or size is more than the threshold, call the library. // The libc version is likely to be faster for these cases. It can use the // address value and run time information about the CPU. @@ -187,6 +191,11 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, if ((Align & 3) != 0) return SDValue(); + // If to a segment-relative address space, use the default lowering. + if (DstPtrInfo.getAddrSpace() >= 256 || + SrcPtrInfo.getAddrSpace() >= 256) + return SDValue(); + // DWORD aligned EVT AVT = MVT::i32; if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) // QWORD aligned