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[SystemZ] Optimize fcmp X, 0 in cases where X is also negated
In such cases it's often better to test the result of the negation instead, since the negation also sets CC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197032 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1252,6 +1252,34 @@ static bool shouldSwapCmpOperands(SDValue Op0, SDValue Op1,
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return false;
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}
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// Return a version of comparison CC mask CCMask in which the LT and GT
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// actions are swapped.
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static unsigned reverseCCMask(unsigned CCMask) {
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return ((CCMask & SystemZ::CCMASK_CMP_EQ) |
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(CCMask & SystemZ::CCMASK_CMP_GT ? SystemZ::CCMASK_CMP_LT : 0) |
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(CCMask & SystemZ::CCMASK_CMP_LT ? SystemZ::CCMASK_CMP_GT : 0) |
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(CCMask & SystemZ::CCMASK_CMP_UO));
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}
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// CmpOp0 and CmpOp1 are being compared using CC mask CCMask. Check whether
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// CmpOp0 is a floating-point result that is also negated and if CmpOp1
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// is zero. In this case we can use the negation to set CC, so avoiding
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// separate LOAD AND TEST and LOAD (NEGATIVE/COMPLEMENT) instructions.
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static void adjustForFNeg(SDValue &CmpOp0, SDValue &CmpOp1, unsigned &CCMask) {
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ConstantFPSDNode *C1 = dyn_cast<ConstantFPSDNode>(CmpOp1);
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if (C1 && C1->isZero()) {
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for (SDNode::use_iterator I = CmpOp0->use_begin(), E = CmpOp0->use_end();
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I != E; ++I) {
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SDNode *N = *I;
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if (N->getOpcode() == ISD::FNEG) {
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CmpOp0 = SDValue(N, 0);
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CCMask = reverseCCMask(CCMask);
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return;
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}
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}
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}
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}
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// Return true if shift operation N has an in-range constant shift value.
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// Store it in ShiftVal if so.
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static bool isSimpleShift(SDValue N, unsigned &ShiftVal) {
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@ -1463,14 +1491,12 @@ static SDValue emitCmp(const SystemZTargetMachine &TM, SelectionDAG &DAG,
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if (shouldSwapCmpOperands(CmpOp0, CmpOp1, ICmpType)) {
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std::swap(CmpOp0, CmpOp1);
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CCMask = ((CCMask & SystemZ::CCMASK_CMP_EQ) |
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(CCMask & SystemZ::CCMASK_CMP_GT ? SystemZ::CCMASK_CMP_LT : 0) |
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(CCMask & SystemZ::CCMASK_CMP_LT ? SystemZ::CCMASK_CMP_GT : 0) |
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(CCMask & SystemZ::CCMASK_CMP_UO));
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CCMask = reverseCCMask(CCMask);
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}
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adjustForTestUnderMask(DAG, Opcode, CmpOp0, CmpOp1, CCValid, CCMask,
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ICmpType);
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adjustForFNeg(CmpOp0, CmpOp1, CCMask);
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if (Opcode == SystemZISD::ICMP || Opcode == SystemZISD::TM)
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return DAG.getNode(Opcode, DL, MVT::Glue, CmpOp0, CmpOp1,
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DAG.getConstant(ICmpType, MVT::i32));
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@ -365,3 +365,43 @@ store:
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exit:
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ret float %res
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}
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; Test another form of f7 in which the condition is based on the unnegated
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; result. This is what InstCombine would produce.
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define float @f18(float %dummy, float %a, float *%dest) {
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; CHECK-LABEL: f18:
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; CHECK: lnebr %f0, %f2
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; CHECK-NEXT: jl .L{{.*}}
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; CHECK: br %r14
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entry:
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%abs = call float @llvm.fabs.f32(float %a)
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%res = fsub float -0.0, %abs
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%cmp = fcmp ogt float %abs, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Similarly for f8.
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define float @f19(float %dummy, float %a, float *%dest) {
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; CHECK-LABEL: f19:
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; CHECK: lcebr %f0, %f2
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; CHECK-NEXT: jle .L{{.*}}
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; CHECK: br %r14
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entry:
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%res = fsub float -0.0, %a
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%cmp = fcmp oge float %a, 0.0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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