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Silence some compilation warnings.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-05-18 01:19:57 +00:00
parent b4b0ce7c29
commit e5e7ce458a
1 changed files with 2 additions and 2 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
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@ -1369,7 +1369,7 @@ SDOperand ARMTargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
unsigned SrcOff = 0, DstOff = 0;
MVT::ValueType VT = MVT::i32;
unsigned VTSize = 4;
const int MAX_LOADS_IN_LDM = 6;
const unsigned MAX_LOADS_IN_LDM = 6;
SDOperand LoadChains[MAX_LOADS_IN_LDM];
SDOperand Loads[MAX_LOADS_IN_LDM];
@ -1377,7 +1377,7 @@ SDOperand ARMTargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
// number of stores. The loads and stores will get combined into
// ldm/stm later on.
while(EmittedNumMemOps < NumMemOps) {
unsigned int i;
unsigned i;
for (i=0; i<MAX_LOADS_IN_LDM && EmittedNumMemOps+i < NumMemOps; i++) {
Loads[i] = DAG.getLoad(VT, Chain,
DAG.getNode(ISD::ADD, VT, Src,