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Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31364 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -240,9 +240,9 @@ public:
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return -1;
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}
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/// getTiedToSrcOperand - Returns the operand that is tied to the specified
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/// findTiedToSrcOperand - Returns the operand that is tied to the specified
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/// dest operand. Returns -1 if there isn't one.
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int getTiedToSrcOperand(MachineOpCode Opcode, unsigned OpNum) const;
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int findTiedToSrcOperand(MachineOpCode Opcode, unsigned OpNum) const;
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/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
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/// instruction if it has one. This is used by codegen passes that update
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@ -200,7 +200,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (physReg == 0) {
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if (op.isDef()) {
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int TiedOp = TM->getInstrInfo()
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->getTiedToSrcOperand(MI->getOpcode(), i);
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->findTiedToSrcOperand(MI->getOpcode(), i);
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if (TiedOp == -1) {
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physReg = getFreeReg(virtualReg);
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} else {
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@ -821,7 +821,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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// If this def is part of a two-address operand, make sure to execute
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// the store from the correct physical register.
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unsigned PhysReg;
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int TiedOp = TII->getTiedToSrcOperand(MI.getOpcode(), i);
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int TiedOp = TII->findTiedToSrcOperand(MI.getOpcode(), i);
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if (TiedOp != -1)
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PhysReg = MI.getOperand(TiedOp).getReg();
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else
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@ -38,8 +38,10 @@ TargetInstrInfo::~TargetInstrInfo() {
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TargetInstrDescriptors = NULL; // reset global variable
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}
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/// findTiedToSrcOperand - Returns the operand that is tied to the specified
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/// dest operand. Returns -1 if there isn't one.
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int
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TargetInstrInfo::getTiedToSrcOperand(MachineOpCode Opc, unsigned OpNum) const {
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TargetInstrInfo::findTiedToSrcOperand(MachineOpCode Opc, unsigned OpNum) const {
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for (unsigned i = 0, e = getNumOperands(Opc); i != e; ++i) {
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if (i == OpNum)
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continue;
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