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Add register Mips::GP to the list of reserved registers if target is bare-metal
to prevent it from being clobbered. mips uses $gp to access small data section. This bug was originally reported by Carl Norum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162340 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -42,7 +42,7 @@ MipsTargetMachine(const Target &T, StringRef TT,
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CodeGenOpt::Level OL,
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bool isLittle)
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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Subtarget(TT, CPU, FS, isLittle),
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Subtarget(TT, CPU, FS, isLittle, RM),
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DataLayout(isLittle ?
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(Subtarget.isABI_N64() ?
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"e-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-f128:128:128-n32" :
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