mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 04:33:05 +00:00
Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
6682746454
commit
e78085a3c0
@ -658,8 +658,7 @@ for a_target in $TARGETS_TO_BUILD; do
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[LLVM architecture name for the native architecture, if available])
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[LLVM architecture name for the native architecture, if available])
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LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
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LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
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LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
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LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
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LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo"
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LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
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LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
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LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
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LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
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LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
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@ -668,10 +667,8 @@ for a_target in $TARGETS_TO_BUILD; do
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[LLVM name for the native Target init function, if available])
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[LLVM name for the native Target init function, if available])
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETINFO, $LLVM_NATIVE_TARGETINFO,
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETINFO, $LLVM_NATIVE_TARGETINFO,
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[LLVM name for the native TargetInfo init function, if available])
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[LLVM name for the native TargetInfo init function, if available])
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCASMINFO, $LLVM_NATIVE_MCASMINFO,
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETMC, $LLVM_NATIVE_TARGETMC,
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[LLVM name for the native MCAsmInfo init function, if available])
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[LLVM name for the native target MC init function, if available])
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCCODEGENINFO, $LLVM_NATIVE_MCCODEGENINFO,
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[LLVM name for the native MCCodeGenInfo init function, if available])
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_ASMPRINTER, $LLVM_NATIVE_ASMPRINTER,
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AC_DEFINE_UNQUOTED(LLVM_NATIVE_ASMPRINTER, $LLVM_NATIVE_ASMPRINTER,
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[LLVM name for the native AsmPrinter init function, if available])
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[LLVM name for the native AsmPrinter init function, if available])
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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@ -336,8 +336,7 @@ else ()
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message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}")
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message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}")
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set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target)
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set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target)
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set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo)
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set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo)
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set(LLVM_NATIVE_MCASMINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo)
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set(LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC)
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set(LLVM_NATIVE_MCCODEGENINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCCODEGENInfo)
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set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter)
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set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter)
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endif ()
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endif ()
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10
configure
vendored
10
configure
vendored
@ -5122,8 +5122,7 @@ _ACEOF
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LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
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LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
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LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
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LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
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LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo"
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LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
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LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
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LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
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LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
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LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
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LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
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@ -5140,12 +5139,7 @@ _ACEOF
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cat >>confdefs.h <<_ACEOF
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cat >>confdefs.h <<_ACEOF
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#define LLVM_NATIVE_MCASMINFO $LLVM_NATIVE_MCASMINFO
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#define LLVM_NATIVE_TARGETMC $LLVM_NATIVE_TARGETMC
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_ACEOF
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cat >>confdefs.h <<_ACEOF
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#define LLVM_NATIVE_MCCODEGENINFO $LLVM_NATIVE_MCCODEGENINFO
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_ACEOF
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_ACEOF
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@ -42,12 +42,7 @@ typedef struct LLVMStructLayout *LLVMStructLayoutRef;
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#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
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#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
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#define LLVM_TARGET(TargetName) \
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCAsmInfo(void);
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void LLVMInitialize##TargetName##TargetMC(void);
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#include "llvm/Config/Targets.def"
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#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCCodeGenInfo(void);
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#include "llvm/Config/Targets.def"
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#include "llvm/Config/Targets.def"
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#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
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#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
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@ -77,8 +72,7 @@ static inline LLVMBool LLVMInitializeNativeTarget(void) {
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#ifdef LLVM_NATIVE_TARGET
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#ifdef LLVM_NATIVE_TARGET
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LLVM_NATIVE_TARGETINFO();
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LLVM_NATIVE_TARGETINFO();
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LLVM_NATIVE_TARGET();
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LLVM_NATIVE_TARGET();
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LLVM_NATIVE_MCASMINFO();
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LLVM_NATIVE_TARGETMC();
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LLVM_NATIVE_MCCODEGENINFO();
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return 0;
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return 0;
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#else
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#else
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return 1;
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return 1;
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@ -576,11 +576,8 @@
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/* LLVM name for the native AsmPrinter init function, if available */
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/* LLVM name for the native AsmPrinter init function, if available */
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#undef LLVM_NATIVE_ASMPRINTER
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#undef LLVM_NATIVE_ASMPRINTER
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/* LLVM name for the native MCAsmInfo init function, if available */
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/* LLVM name for the native TargetMC init function, if available */
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#undef LLVM_NATIVE_MCASMINFO
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#undef LLVM_NATIVE_TARGETMC
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/* LLVM name for the native MCCodeGenInfo init function, if available */
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#undef LLVM_NATIVE_MCCODEGENINFO
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/* LLVM name for the native Target init function, if available */
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/* LLVM name for the native Target init function, if available */
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#undef LLVM_NATIVE_TARGET
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#undef LLVM_NATIVE_TARGET
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@ -58,11 +58,8 @@
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/* LLVM name for the native TargetInfo init function, if available */
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/* LLVM name for the native TargetInfo init function, if available */
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#undef LLVM_NATIVE_TARGETINFO
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#undef LLVM_NATIVE_TARGETINFO
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/* LLVM name for the native MCAsmInfo init function, if available */
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/* LLVM name for the native TargetMC init function, if available */
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#undef LLVM_NATIVE_MCASMINFO
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#undef LLVM_NATIVE_TARGETMC
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/* LLVM name for the native MCCodeGenInfo init function, if available */
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#undef LLVM_NATIVE_MCCODEGENINFO
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/* LLVM name for the native AsmPrinter init function, if available */
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/* LLVM name for the native AsmPrinter init function, if available */
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#undef LLVM_NATIVE_ASMPRINTER
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#undef LLVM_NATIVE_ASMPRINTER
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@ -26,24 +26,8 @@ extern "C" {
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#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target();
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#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target();
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#include "llvm/Config/Targets.def"
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#include "llvm/Config/Targets.def"
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#define LLVM_TARGET(TargetName) \
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// Declare all of the target-MC-initialization functions that are available.
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void LLVMInitialize##TargetName##MCAsmInfo();
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#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetMC();
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#include "llvm/Config/Targets.def"
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCCodeGenInfo();
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#include "llvm/Config/Targets.def"
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCInstrInfo();
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#include "llvm/Config/Targets.def"
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCRegisterInfo();
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#include "llvm/Config/Targets.def"
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#define LLVM_TARGET(TargetName) \
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void LLVMInitialize##TargetName##MCSubtargetInfo();
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#include "llvm/Config/Targets.def"
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#include "llvm/Config/Targets.def"
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// Declare all of the available assembly printer initialization functions.
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// Declare all of the available assembly printer initialization functions.
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@ -84,56 +68,13 @@ namespace llvm {
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#include "llvm/Config/Targets.def"
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#include "llvm/Config/Targets.def"
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}
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}
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/// InitializeAllMCAsmInfos - The main program should call this function
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/// InitializeAllTargetMCs - The main program should call this function if it
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/// if it wants access to all available assembly infos for targets that
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/// wants access to all available target MC that LLVM is configured to
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/// LLVM is configured to support, to make them available via the
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/// TargetRegistry.
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///
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/// It is legal for a client to make multiple calls to this function.
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inline void InitializeAllMCAsmInfos() {
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCAsmInfo();
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#include "llvm/Config/Targets.def"
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}
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/// InitializeAllMCCodeGenInfos - The main program should call this function
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/// if it wants access to all targets machines that LLVM is configured to
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/// support, to make them available via the TargetRegistry.
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/// support, to make them available via the TargetRegistry.
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///
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///
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/// It is legal for a client to make multiple calls to this function.
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/// It is legal for a client to make multiple calls to this function.
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inline void InitializeAllMCCodeGenInfos() {
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inline void InitializeAllTargetMCs() {
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCCodeGenInfo();
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC();
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#include "llvm/Config/Targets.def"
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}
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/// InitializeAllMCInstrInfos - The main program should call this function
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/// if it wants access to all available instruction infos for targets that
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/// LLVM is configured to support, to make them available via the
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/// TargetRegistry.
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///
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/// It is legal for a client to make multiple calls to this function.
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inline void InitializeAllMCInstrInfos() {
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCInstrInfo();
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#include "llvm/Config/Targets.def"
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}
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/// InitializeAllMCRegisterInfos - The main program should call this function
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/// if it wants access to all available register infos for targets that
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/// LLVM is configured to support, to make them available via the
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/// TargetRegistry.
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///
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/// It is legal for a client to make multiple calls to this function.
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inline void InitializeAllMCRegisterInfos() {
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCRegisterInfo();
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#include "llvm/Config/Targets.def"
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}
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/// InitializeAllMCSubtargetInfos - The main program should call this function
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/// if it wants access to all available subtarget infos for targets that LLVM
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/// is configured to support, to make them available via the TargetRegistry.
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///
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/// It is legal for a client to make multiple calls to this function.
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inline void InitializeAllMCSubtargetInfos() {
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#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCSubtargetInfo();
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#include "llvm/Config/Targets.def"
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#include "llvm/Config/Targets.def"
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}
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}
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@ -177,8 +118,7 @@ namespace llvm {
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#ifdef LLVM_NATIVE_TARGET
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#ifdef LLVM_NATIVE_TARGET
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LLVM_NATIVE_TARGETINFO();
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LLVM_NATIVE_TARGETINFO();
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LLVM_NATIVE_TARGET();
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LLVM_NATIVE_TARGET();
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LLVM_NATIVE_MCASMINFO();
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LLVM_NATIVE_TARGETMC();
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LLVM_NATIVE_MCCODEGENINFO();
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return false;
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return false;
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#else
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#else
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return true;
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return true;
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@ -37,9 +37,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
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LLVMSymbolLookupCallback SymbolLookUp) {
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LLVMSymbolLookupCallback SymbolLookUp) {
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// Initialize targets and assembly printers/parsers.
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// Initialize targets and assembly printers/parsers.
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llvm::InitializeAllTargetInfos();
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llvm::InitializeAllTargetInfos();
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llvm::InitializeAllMCAsmInfos();
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llvm::InitializeAllTargetMCs();
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llvm::InitializeAllMCCodeGenInfos();
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llvm::InitializeAllMCRegisterInfos();
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llvm::InitializeAllAsmPrinters();
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llvm::InitializeAllAsmPrinters();
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llvm::InitializeAllAsmParsers();
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llvm::InitializeAllAsmParsers();
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llvm::InitializeAllDisassemblers();
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llvm::InitializeAllDisassemblers();
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@ -108,10 +108,7 @@ void EDDisassembler::initialize() {
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InitializeAllTargetInfos();
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InitializeAllTargetInfos();
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InitializeAllTargets();
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InitializeAllTargets();
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InitializeAllMCCodeGenInfos();
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InitializeAllTargetMCs();
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InitializeAllMCAsmInfos();
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InitializeAllMCRegisterInfos();
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InitializeAllMCSubtargetInfos();
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InitializeAllAsmPrinters();
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InitializeAllAsmPrinters();
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InitializeAllAsmParsers();
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InitializeAllAsmParsers();
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InitializeAllDisassemblers();
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InitializeAllDisassemblers();
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@ -178,6 +175,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
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TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
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TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
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featureString));
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featureString));
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// FIXME: It shouldn't be using TargetRegisterInfo!
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const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
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const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
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if (!registerInfo)
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if (!registerInfo)
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@ -98,36 +98,18 @@ MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
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return X;
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return X;
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}
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}
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// Force static initialization.
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extern "C" void LLVMInitializeARMMCSubtargetInfo() {
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TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
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ARM_MC::createARMMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
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ARM_MC::createARMMCSubtargetInfo);
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}
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static MCInstrInfo *createARMMCInstrInfo() {
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static MCInstrInfo *createARMMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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MCInstrInfo *X = new MCInstrInfo();
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InitARMMCInstrInfo(X);
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InitARMMCInstrInfo(X);
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return X;
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return X;
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}
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}
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extern "C" void LLVMInitializeARMMCInstrInfo() {
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TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
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}
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static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) {
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static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) {
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MCRegisterInfo *X = new MCRegisterInfo();
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MCRegisterInfo *X = new MCRegisterInfo();
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InitARMMCRegisterInfo(X, ARM::LR);
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InitARMMCRegisterInfo(X, ARM::LR);
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return X;
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return X;
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}
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}
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extern "C" void LLVMInitializeARMMCRegisterInfo() {
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TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
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}
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static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
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static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
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Triple TheTriple(TT);
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Triple TheTriple(TT);
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@ -137,12 +119,6 @@ static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
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return new ARMELFMCAsmInfo();
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return new ARMELFMCAsmInfo();
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}
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}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeARMMCAsmInfo() {
|
|
||||||
// Register the target asm info.
|
|
||||||
RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
|
|
||||||
RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -152,7 +128,27 @@ MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeARMMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeARMTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
|
||||||
|
RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo);
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
|
||||||
|
ARM_MC::createARMMCSubtargetInfo);
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
|
||||||
|
ARM_MC::createARMMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -36,20 +36,12 @@ static MCInstrInfo *createAlphaMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeAlphaMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitAlphaMCRegisterInfo(X, Alpha::R26);
|
InitAlphaMCRegisterInfo(X, Alpha::R26);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeAlphaMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -57,15 +49,6 @@ static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeAlphaMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
|
|
||||||
createAlphaMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeAlphaMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -73,8 +56,22 @@ MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeAlphaMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeAlphaTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget,
|
||||||
createAlphaMCCodeGenInfo);
|
createAlphaMCCodeGenInfo);
|
||||||
}
|
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
|
||||||
|
createAlphaMCSubtargetInfo);
|
||||||
|
}
|
||||||
|
@ -36,22 +36,12 @@ static MCInstrInfo *createBlackfinMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeBlackfinMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
|
|
||||||
createBlackfinMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitBlackfinMCRegisterInfo(X, BF::RETS);
|
InitBlackfinMCRegisterInfo(X, BF::RETS);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeBlackfinMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
|
|
||||||
createBlackfinMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
|
static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
|
||||||
StringRef CPU,
|
StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
@ -60,15 +50,6 @@ static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeBlackfinMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
|
|
||||||
createBlackfinMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeBlackfinMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -76,7 +57,24 @@ MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeBlackfinMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeBlackfinTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget,
|
||||||
createBlackfinMCCodeGenInfo);
|
createBlackfinMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
|
||||||
|
createBlackfinMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
|
||||||
|
createBlackfinMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
|
||||||
|
createBlackfinMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -64,15 +64,7 @@ extern "C" void LLVMInitializeCBackendTarget() {
|
|||||||
RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget);
|
RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget);
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCBackendMCAsmInfo() {}
|
extern "C" void LLVMInitializeCBackendTargetMC() {}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCBackendMCRegisterInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCBackendMCInstrInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCBackendMCSubtargetInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCBackendMCCodeGenInfo() {}
|
|
||||||
|
|
||||||
namespace {
|
namespace {
|
||||||
class CBEMCAsmInfo : public MCAsmInfo {
|
class CBEMCAsmInfo : public MCAsmInfo {
|
||||||
|
@ -36,21 +36,12 @@ static MCInstrInfo *createSPUMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCellSPUMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitSPUMCRegisterInfo(X, SPU::R0);
|
InitSPUMCRegisterInfo(X, SPU::R0);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCellSPUMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
|
|
||||||
createCellSPUMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -58,11 +49,6 @@ static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCellSPUMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
|
|
||||||
createSPUMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
|
||||||
MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT);
|
MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT);
|
||||||
|
|
||||||
@ -74,10 +60,6 @@ static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
return MAI;
|
return MAI;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCellSPUMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -87,7 +69,23 @@ MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCellSPUMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeCellSPUTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget,
|
||||||
createSPUMCCodeGenInfo);
|
createSPUMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
|
||||||
|
createCellSPUMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
|
||||||
|
createSPUMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -77,15 +77,7 @@ extern "C" void LLVMInitializeCppBackendTarget() {
|
|||||||
RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget);
|
RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget);
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCppBackendMCAsmInfo() {}
|
extern "C" void LLVMInitializeCppBackendTargetMC() {}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCppBackendMCRegisterInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCppBackendMCInstrInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCppBackendMCSubtargetInfo() {}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeCppBackendMCCodeGenInfo() {}
|
|
||||||
|
|
||||||
namespace {
|
namespace {
|
||||||
typedef std::vector<Type*> TypeList;
|
typedef std::vector<Type*> TypeList;
|
||||||
|
@ -36,21 +36,12 @@ static MCInstrInfo *createMBlazeMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMBlazeMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitMBlazeMCRegisterInfo(X, MBlaze::R15);
|
InitMBlazeMCRegisterInfo(X, MBlaze::R15);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMBlazeMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
|
|
||||||
createMBlazeMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -58,11 +49,6 @@ static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMBlazeMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
|
|
||||||
createMBlazeMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
|
||||||
Triple TheTriple(TT);
|
Triple TheTriple(TT);
|
||||||
switch (TheTriple.getOS()) {
|
switch (TheTriple.getOS()) {
|
||||||
@ -71,10 +57,6 @@ static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMBlazeMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -86,7 +68,23 @@ MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMBlazeMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeMBlazeTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget,
|
||||||
createMBlazeMCCodeGenInfo);
|
createMBlazeMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
|
||||||
|
createMBlazeMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
|
||||||
|
createMBlazeMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -35,22 +35,12 @@ static MCInstrInfo *createMSP430MCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMSP430MCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitMSP430MCRegisterInfo(X, MSP430::PCW);
|
InitMSP430MCRegisterInfo(X, MSP430::PCW);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMSP430MCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
|
|
||||||
createMSP430MCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -58,15 +48,6 @@ static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMSP430MCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
|
|
||||||
createMSP430MCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMSP430MCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -74,7 +55,22 @@ MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMSP430MCCodeGenInfo() {
|
extern "C" void LLVMInitializeMSP430TargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target,
|
TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target,
|
||||||
createMSP430MCCodeGenInfo);
|
createMSP430MCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
|
||||||
|
createMSP430MCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
|
||||||
|
createMSP430MCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -36,21 +36,12 @@ static MCInstrInfo *createMipsMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMipsMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitMipsMCRegisterInfo(X, Mips::RA);
|
InitMipsMCRegisterInfo(X, Mips::RA);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMipsMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -58,11 +49,6 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMipsMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
|
|
||||||
createMipsMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
|
||||||
MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT);
|
MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT);
|
||||||
|
|
||||||
@ -73,11 +59,6 @@ static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
return MAI;
|
return MAI;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMipsMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
|
|
||||||
RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -93,9 +74,25 @@ MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeMipsMCCodeGenInfo() {
|
extern "C" void LLVMInitializeMipsTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
|
||||||
|
RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
|
||||||
createMipsMCCodeGenInfo);
|
createMipsMCCodeGenInfo);
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
|
||||||
createMipsMCCodeGenInfo);
|
createMipsMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
|
||||||
|
createMipsMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -35,11 +35,6 @@ static MCInstrInfo *createPTXMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePTXMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
// PTX does not have a return address register.
|
// PTX does not have a return address register.
|
||||||
@ -47,11 +42,6 @@ static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePTXMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
|
|
||||||
TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -59,18 +49,6 @@ static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePTXMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
|
|
||||||
createPTXMCSubtargetInfo);
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
|
|
||||||
createPTXMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializePTXMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
|
|
||||||
RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -78,7 +56,26 @@ MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePTXMCCodeGenInfo() {
|
extern "C" void LLVMInitializePTXTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
|
||||||
|
RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
|
||||||
|
TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
|
||||||
|
createPTXMCSubtargetInfo);
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
|
||||||
|
createPTXMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -36,11 +36,6 @@ static MCInstrInfo *createPPCMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePowerPCMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
|
||||||
Triple TheTriple(TT);
|
Triple TheTriple(TT);
|
||||||
bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
|
bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
|
||||||
@ -52,11 +47,6 @@ static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePowerPCMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
|
|
||||||
TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -64,13 +54,6 @@ static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePowerPCMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
|
|
||||||
createPPCMCSubtargetInfo);
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
|
|
||||||
createPPCMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
|
||||||
Triple TheTriple(TT);
|
Triple TheTriple(TT);
|
||||||
bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
|
bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
|
||||||
@ -89,11 +72,6 @@ static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
return MAI;
|
return MAI;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePowerPCMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
|
|
||||||
RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -109,7 +87,26 @@ MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializePowerPCMCCodeGenInfo() {
|
extern "C" void LLVMInitializePowerPCTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
|
||||||
|
RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
|
TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
|
||||||
|
TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
|
||||||
|
createPPCMCSubtargetInfo);
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
|
||||||
|
createPPCMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -35,20 +35,12 @@ static MCInstrInfo *createSparcMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSparcMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitSparcMCRegisterInfo(X, SP::I7);
|
InitSparcMCRegisterInfo(X, SP::I7);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSparcMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -56,16 +48,6 @@ static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSparcMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
|
|
||||||
createSparcMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSparcMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
|
|
||||||
RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -73,10 +55,24 @@ MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSparcMCCodeGenInfo() {
|
extern "C" void LLVMInitializeSparcTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
|
||||||
|
RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
|
||||||
createSparcMCCodeGenInfo);
|
createSparcMCCodeGenInfo);
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
|
TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
|
||||||
createSparcMCCodeGenInfo);
|
createSparcMCCodeGenInfo);
|
||||||
}
|
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
|
||||||
|
createSparcMCSubtargetInfo);
|
||||||
|
}
|
||||||
|
@ -35,22 +35,12 @@ static MCInstrInfo *createSystemZMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSystemZMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
|
|
||||||
createSystemZMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitSystemZMCRegisterInfo(X, 0);
|
InitSystemZMCRegisterInfo(X, 0);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSystemZMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
|
|
||||||
createSystemZMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
|
static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
|
||||||
StringRef CPU,
|
StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
@ -59,15 +49,6 @@ static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSystemZMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
|
|
||||||
createSystemZMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSystemZMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -77,7 +58,23 @@ MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeSystemZMCCodeGenInfo() {
|
extern "C" void LLVMInitializeSystemZTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
|
||||||
createSystemZMCCodeGenInfo);
|
createSystemZMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
|
||||||
|
createSystemZMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
|
||||||
|
createSystemZMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
|
||||||
|
createSystemZMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -261,25 +261,12 @@ MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Force static initialization.
|
|
||||||
extern "C" void LLVMInitializeX86MCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
|
|
||||||
X86_MC::createX86MCSubtargetInfo);
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
|
|
||||||
X86_MC::createX86MCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCInstrInfo *createX86MCInstrInfo() {
|
static MCInstrInfo *createX86MCInstrInfo() {
|
||||||
MCInstrInfo *X = new MCInstrInfo();
|
MCInstrInfo *X = new MCInstrInfo();
|
||||||
InitX86MCInstrInfo(X);
|
InitX86MCInstrInfo(X);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeX86MCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
|
||||||
Triple TheTriple(TT);
|
Triple TheTriple(TT);
|
||||||
unsigned RA = (TheTriple.getArch() == Triple::x86_64)
|
unsigned RA = (TheTriple.getArch() == Triple::x86_64)
|
||||||
@ -294,12 +281,6 @@ static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeX86MCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
|
||||||
Triple TheTriple(TT);
|
Triple TheTriple(TT);
|
||||||
bool is64Bit = TheTriple.getArch() == Triple::x86_64;
|
bool is64Bit = TheTriple.getArch() == Triple::x86_64;
|
||||||
@ -333,12 +314,6 @@ static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
return MAI;
|
return MAI;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeX86MCAsmInfo() {
|
|
||||||
// Register the target asm info.
|
|
||||||
RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
|
|
||||||
RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -388,8 +363,27 @@ MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeX86MCCodeGenInfo() {
|
// Force static initialization.
|
||||||
// Register the target asm info.
|
extern "C" void LLVMInitializeX86TargetMC() {
|
||||||
RegisterMCCodeGenInfoFn A(TheX86_32Target, createX86MCCodeGenInfo);
|
// Register the MC asm info.
|
||||||
RegisterMCCodeGenInfoFn B(TheX86_64Target, createX86MCCodeGenInfo);
|
RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
|
||||||
|
RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
|
RegisterMCCodeGenInfoFn C(TheX86_32Target, createX86MCCodeGenInfo);
|
||||||
|
RegisterMCCodeGenInfoFn D(TheX86_64Target, createX86MCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
|
||||||
|
X86_MC::createX86MCSubtargetInfo);
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
|
||||||
|
X86_MC::createX86MCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -35,20 +35,12 @@ static MCInstrInfo *createXCoreMCInstrInfo() {
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeXCoreMCInstrInfo() {
|
|
||||||
TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
|
static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
|
||||||
MCRegisterInfo *X = new MCRegisterInfo();
|
MCRegisterInfo *X = new MCRegisterInfo();
|
||||||
InitXCoreMCRegisterInfo(X, XCore::LR);
|
InitXCoreMCRegisterInfo(X, XCore::LR);
|
||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeXCoreMCRegisterInfo() {
|
|
||||||
TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
|
static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
|
||||||
StringRef FS) {
|
StringRef FS) {
|
||||||
MCSubtargetInfo *X = new MCSubtargetInfo();
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
||||||
@ -56,11 +48,6 @@ static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeXCoreMCSubtargetInfo() {
|
|
||||||
TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
|
|
||||||
createXCoreMCSubtargetInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
|
static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
|
||||||
MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
|
MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
|
||||||
|
|
||||||
@ -72,10 +59,6 @@ static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
|
|||||||
return MAI;
|
return MAI;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeXCoreMCAsmInfo() {
|
|
||||||
RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
|
|
||||||
}
|
|
||||||
|
|
||||||
MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
||||||
CodeModel::Model CM) {
|
CodeModel::Model CM) {
|
||||||
MCCodeGenInfo *X = new MCCodeGenInfo();
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
||||||
@ -83,7 +66,22 @@ MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
|||||||
return X;
|
return X;
|
||||||
}
|
}
|
||||||
|
|
||||||
extern "C" void LLVMInitializeXCoreMCCodeGenInfo() {
|
// Force static initialization.
|
||||||
|
extern "C" void LLVMInitializeXCoreTargetMC() {
|
||||||
|
// Register the MC asm info.
|
||||||
|
RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
|
||||||
|
|
||||||
|
// Register the MC codegen info.
|
||||||
TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
|
TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
|
||||||
createXCoreMCCodeGenInfo);
|
createXCoreMCCodeGenInfo);
|
||||||
|
|
||||||
|
// Register the MC instruction info.
|
||||||
|
TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
|
||||||
|
|
||||||
|
// Register the MC register info.
|
||||||
|
TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
|
||||||
|
|
||||||
|
// Register the MC subtarget info.
|
||||||
|
TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
|
||||||
|
createXCoreMCSubtargetInfo);
|
||||||
}
|
}
|
||||||
|
@ -232,9 +232,7 @@ int main(int argc, char **argv) {
|
|||||||
|
|
||||||
// Initialize targets first, so that --version shows registered targets.
|
// Initialize targets first, so that --version shows registered targets.
|
||||||
InitializeAllTargets();
|
InitializeAllTargets();
|
||||||
InitializeAllMCAsmInfos();
|
InitializeAllTargetMCs();
|
||||||
InitializeAllMCCodeGenInfos();
|
|
||||||
InitializeAllMCSubtargetInfos();
|
|
||||||
InitializeAllAsmPrinters();
|
InitializeAllAsmPrinters();
|
||||||
InitializeAllAsmParsers();
|
InitializeAllAsmParsers();
|
||||||
|
|
||||||
|
@ -454,11 +454,7 @@ int main(int argc, char **argv) {
|
|||||||
llvm::InitializeAllTargetInfos();
|
llvm::InitializeAllTargetInfos();
|
||||||
// FIXME: We shouldn't need to initialize the Target(Machine)s.
|
// FIXME: We shouldn't need to initialize the Target(Machine)s.
|
||||||
llvm::InitializeAllTargets();
|
llvm::InitializeAllTargets();
|
||||||
llvm::InitializeAllMCAsmInfos();
|
llvm::InitializeAllTargetMCs();
|
||||||
llvm::InitializeAllMCCodeGenInfos();
|
|
||||||
llvm::InitializeAllMCInstrInfos();
|
|
||||||
llvm::InitializeAllMCRegisterInfos();
|
|
||||||
llvm::InitializeAllMCSubtargetInfos();
|
|
||||||
llvm::InitializeAllAsmPrinters();
|
llvm::InitializeAllAsmPrinters();
|
||||||
llvm::InitializeAllAsmParsers();
|
llvm::InitializeAllAsmParsers();
|
||||||
llvm::InitializeAllDisassemblers();
|
llvm::InitializeAllDisassemblers();
|
||||||
|
@ -310,9 +310,7 @@ int main(int argc, char **argv) {
|
|||||||
llvm::InitializeAllTargetInfos();
|
llvm::InitializeAllTargetInfos();
|
||||||
// FIXME: We shouldn't need to initialize the Target(Machine)s.
|
// FIXME: We shouldn't need to initialize the Target(Machine)s.
|
||||||
llvm::InitializeAllTargets();
|
llvm::InitializeAllTargets();
|
||||||
llvm::InitializeAllMCAsmInfos();
|
llvm::InitializeAllTargetMCs();
|
||||||
llvm::InitializeAllMCCodeGenInfos();
|
|
||||||
llvm::InitializeAllMCInstrInfos();
|
|
||||||
llvm::InitializeAllAsmPrinters();
|
llvm::InitializeAllAsmPrinters();
|
||||||
llvm::InitializeAllAsmParsers();
|
llvm::InitializeAllAsmParsers();
|
||||||
llvm::InitializeAllDisassemblers();
|
llvm::InitializeAllDisassemblers();
|
||||||
|
@ -74,10 +74,7 @@ LTOCodeGenerator::LTOCodeGenerator()
|
|||||||
_nativeObjectFile(NULL)
|
_nativeObjectFile(NULL)
|
||||||
{
|
{
|
||||||
InitializeAllTargets();
|
InitializeAllTargets();
|
||||||
InitializeAllMCAsmInfos();
|
InitializeAllTargetMCs();
|
||||||
InitializeAllMCCodeGenInfos();
|
|
||||||
InitializeAllMCRegisterInfos();
|
|
||||||
InitializeAllMCSubtargetInfos();
|
|
||||||
InitializeAllAsmPrinters();
|
InitializeAllAsmPrinters();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -136,9 +136,7 @@ LTOModule *LTOModule::makeLTOModule(MemoryBuffer *buffer,
|
|||||||
static bool Initialized = false;
|
static bool Initialized = false;
|
||||||
if (!Initialized) {
|
if (!Initialized) {
|
||||||
InitializeAllTargets();
|
InitializeAllTargets();
|
||||||
InitializeAllMCCodeGenInfos();
|
InitializeAllTargetMCs();
|
||||||
InitializeAllMCAsmInfos();
|
|
||||||
InitializeAllMCSubtargetInfos();
|
|
||||||
InitializeAllAsmParsers();
|
InitializeAllAsmParsers();
|
||||||
Initialized = true;
|
Initialized = true;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user