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Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,

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InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2011-07-22 21:58:54 +00:00
parent 6682746454
commit e78085a3c0
29 changed files with 264 additions and 420 deletions
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9
autoconf/configure.ac
View File

@ -658,8 +658,7 @@ for a_target in $TARGETS_TO_BUILD; do
[LLVM architecture name for the native architecture, if available]) [LLVM architecture name for the native architecture, if available])
LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target" LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo" LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo" LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter" LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser" LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
@ -668,10 +667,8 @@ for a_target in $TARGETS_TO_BUILD; do
[LLVM name for the native Target init function, if available]) [LLVM name for the native Target init function, if available])
AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETINFO, $LLVM_NATIVE_TARGETINFO, AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETINFO, $LLVM_NATIVE_TARGETINFO,
[LLVM name for the native TargetInfo init function, if available]) [LLVM name for the native TargetInfo init function, if available])
AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCASMINFO, $LLVM_NATIVE_MCASMINFO, AC_DEFINE_UNQUOTED(LLVM_NATIVE_TARGETMC, $LLVM_NATIVE_TARGETMC,
[LLVM name for the native MCAsmInfo init function, if available]) [LLVM name for the native target MC init function, if available])
AC_DEFINE_UNQUOTED(LLVM_NATIVE_MCCODEGENINFO, $LLVM_NATIVE_MCCODEGENINFO,
[LLVM name for the native MCCodeGenInfo init function, if available])
AC_DEFINE_UNQUOTED(LLVM_NATIVE_ASMPRINTER, $LLVM_NATIVE_ASMPRINTER, AC_DEFINE_UNQUOTED(LLVM_NATIVE_ASMPRINTER, $LLVM_NATIVE_ASMPRINTER,
[LLVM name for the native AsmPrinter init function, if available]) [LLVM name for the native AsmPrinter init function, if available])
if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then

3
cmake/config-ix.cmake
View File

@ -336,8 +336,7 @@ else ()
message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}") message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}")
set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target) set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target)
set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo) set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo)
set(LLVM_NATIVE_MCASMINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo) set(LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC)
set(LLVM_NATIVE_MCCODEGENINFO LLVMInitialize${LLVM_NATIVE_ARCH}MCCODEGENInfo)
set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter) set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter)
endif () endif ()

10
configure vendored
View File

@ -5122,8 +5122,7 @@ _ACEOF
LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target" LLVM_NATIVE_TARGET="LLVMInitialize${LLVM_NATIVE_ARCH}Target"
LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo" LLVM_NATIVE_TARGETINFO="LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo"
LLVM_NATIVE_MCASMINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCAsmInfo" LLVM_NATIVE_TARGETMC="LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC"
LLVM_NATIVE_MCCODEGENINFO="LLVMInitialize${LLVM_NATIVE_ARCH}MCCodeGenInfo"
LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter" LLVM_NATIVE_ASMPRINTER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter"
if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then if test -f ${srcdir}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/Makefile ; then
LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser" LLVM_NATIVE_ASMPARSER="LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser"
@ -5140,12 +5139,7 @@ _ACEOF
cat >>confdefs.h <<_ACEOF cat >>confdefs.h <<_ACEOF
#define LLVM_NATIVE_MCASMINFO $LLVM_NATIVE_MCASMINFO #define LLVM_NATIVE_TARGETMC $LLVM_NATIVE_TARGETMC
_ACEOF
cat >>confdefs.h <<_ACEOF
#define LLVM_NATIVE_MCCODEGENINFO $LLVM_NATIVE_MCCODEGENINFO
_ACEOF _ACEOF

10
include/llvm-c/Target.h
View File

@ -42,12 +42,7 @@ typedef struct LLVMStructLayout *LLVMStructLayoutRef;
#undef LLVM_TARGET /* Explicit undef to make SWIG happier */ #undef LLVM_TARGET /* Explicit undef to make SWIG happier */
#define LLVM_TARGET(TargetName) \ #define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCAsmInfo(void); void LLVMInitialize##TargetName##TargetMC(void);
#include "llvm/Config/Targets.def"
#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
#define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCCodeGenInfo(void);
#include "llvm/Config/Targets.def" #include "llvm/Config/Targets.def"
#undef LLVM_TARGET /* Explicit undef to make SWIG happier */ #undef LLVM_TARGET /* Explicit undef to make SWIG happier */
@ -77,8 +72,7 @@ static inline LLVMBool LLVMInitializeNativeTarget(void) {
#ifdef LLVM_NATIVE_TARGET #ifdef LLVM_NATIVE_TARGET
LLVM_NATIVE_TARGETINFO(); LLVM_NATIVE_TARGETINFO();
LLVM_NATIVE_TARGET(); LLVM_NATIVE_TARGET();
LLVM_NATIVE_MCASMINFO(); LLVM_NATIVE_TARGETMC();
LLVM_NATIVE_MCCODEGENINFO();
return 0; return 0;
#else #else
return 1; return 1;

7
include/llvm/Config/config.h.in
View File

@ -576,11 +576,8 @@
/* LLVM name for the native AsmPrinter init function, if available */ /* LLVM name for the native AsmPrinter init function, if available */
#undef LLVM_NATIVE_ASMPRINTER #undef LLVM_NATIVE_ASMPRINTER
/* LLVM name for the native MCAsmInfo init function, if available */ /* LLVM name for the native TargetMC init function, if available */
#undef LLVM_NATIVE_MCASMINFO #undef LLVM_NATIVE_TARGETMC
/* LLVM name for the native MCCodeGenInfo init function, if available */
#undef LLVM_NATIVE_MCCODEGENINFO
/* LLVM name for the native Target init function, if available */ /* LLVM name for the native Target init function, if available */
#undef LLVM_NATIVE_TARGET #undef LLVM_NATIVE_TARGET

7
include/llvm/Config/llvm-config.h.in
View File

@ -58,11 +58,8 @@
/* LLVM name for the native TargetInfo init function, if available */ /* LLVM name for the native TargetInfo init function, if available */
#undef LLVM_NATIVE_TARGETINFO #undef LLVM_NATIVE_TARGETINFO
/* LLVM name for the native MCAsmInfo init function, if available */ /* LLVM name for the native TargetMC init function, if available */
#undef LLVM_NATIVE_MCASMINFO #undef LLVM_NATIVE_TARGETMC
/* LLVM name for the native MCCodeGenInfo init function, if available */
#undef LLVM_NATIVE_MCCODEGENINFO
/* LLVM name for the native AsmPrinter init function, if available */ /* LLVM name for the native AsmPrinter init function, if available */
#undef LLVM_NATIVE_ASMPRINTER #undef LLVM_NATIVE_ASMPRINTER

76
include/llvm/Target/TargetSelect.h
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@ -26,26 +26,10 @@ extern "C" {
#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target(); #define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target();
#include "llvm/Config/Targets.def" #include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) \ // Declare all of the target-MC-initialization functions that are available.
void LLVMInitialize##TargetName##MCAsmInfo(); #define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetMC();
#include "llvm/Config/Targets.def" #include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCCodeGenInfo();
#include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCInstrInfo();
#include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCRegisterInfo();
#include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) \
void LLVMInitialize##TargetName##MCSubtargetInfo();
#include "llvm/Config/Targets.def"
// Declare all of the available assembly printer initialization functions. // Declare all of the available assembly printer initialization functions.
#define LLVM_ASM_PRINTER(TargetName) void LLVMInitialize##TargetName##AsmPrinter(); #define LLVM_ASM_PRINTER(TargetName) void LLVMInitialize##TargetName##AsmPrinter();
#include "llvm/Config/AsmPrinters.def" #include "llvm/Config/AsmPrinters.def"
@ -84,56 +68,13 @@ namespace llvm {
#include "llvm/Config/Targets.def" #include "llvm/Config/Targets.def"
} }
/// InitializeAllMCAsmInfos - The main program should call this function /// InitializeAllTargetMCs - The main program should call this function if it
/// if it wants access to all available assembly infos for targets that /// wants access to all available target MC that LLVM is configured to
/// LLVM is configured to support, to make them available via the
/// TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllMCAsmInfos() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCAsmInfo();
#include "llvm/Config/Targets.def"
}
/// InitializeAllMCCodeGenInfos - The main program should call this function
/// if it wants access to all targets machines that LLVM is configured to
/// support, to make them available via the TargetRegistry. /// support, to make them available via the TargetRegistry.
/// ///
/// It is legal for a client to make multiple calls to this function. /// It is legal for a client to make multiple calls to this function.
inline void InitializeAllMCCodeGenInfos() { inline void InitializeAllTargetMCs() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCCodeGenInfo(); #define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC();
#include "llvm/Config/Targets.def"
}
/// InitializeAllMCInstrInfos - The main program should call this function
/// if it wants access to all available instruction infos for targets that
/// LLVM is configured to support, to make them available via the
/// TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllMCInstrInfos() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCInstrInfo();
#include "llvm/Config/Targets.def"
}
/// InitializeAllMCRegisterInfos - The main program should call this function
/// if it wants access to all available register infos for targets that
/// LLVM is configured to support, to make them available via the
/// TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllMCRegisterInfos() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCRegisterInfo();
#include "llvm/Config/Targets.def"
}
/// InitializeAllMCSubtargetInfos - The main program should call this function
/// if it wants access to all available subtarget infos for targets that LLVM
/// is configured to support, to make them available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllMCSubtargetInfos() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCSubtargetInfo();
#include "llvm/Config/Targets.def" #include "llvm/Config/Targets.def"
} }
@ -177,8 +118,7 @@ namespace llvm {
#ifdef LLVM_NATIVE_TARGET #ifdef LLVM_NATIVE_TARGET
LLVM_NATIVE_TARGETINFO(); LLVM_NATIVE_TARGETINFO();
LLVM_NATIVE_TARGET(); LLVM_NATIVE_TARGET();
LLVM_NATIVE_MCASMINFO(); LLVM_NATIVE_TARGETMC();
LLVM_NATIVE_MCCODEGENINFO();
return false; return false;
#else #else
return true; return true;

4
lib/MC/MCDisassembler/Disassembler.cpp
View File

@ -37,9 +37,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
LLVMSymbolLookupCallback SymbolLookUp) { LLVMSymbolLookupCallback SymbolLookUp) {
// Initialize targets and assembly printers/parsers. // Initialize targets and assembly printers/parsers.
llvm::InitializeAllTargetInfos(); llvm::InitializeAllTargetInfos();
llvm::InitializeAllMCAsmInfos(); llvm::InitializeAllTargetMCs();
llvm::InitializeAllMCCodeGenInfos();
llvm::InitializeAllMCRegisterInfos();
llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers(); llvm::InitializeAllAsmParsers();
llvm::InitializeAllDisassemblers(); llvm::InitializeAllDisassemblers();

6
lib/MC/MCDisassembler/EDDisassembler.cpp
View File

@ -108,10 +108,7 @@ void EDDisassembler::initialize() {
InitializeAllTargetInfos(); InitializeAllTargetInfos();
InitializeAllTargets(); InitializeAllTargets();
InitializeAllMCCodeGenInfos(); InitializeAllTargetMCs();
InitializeAllMCAsmInfos();
InitializeAllMCRegisterInfos();
InitializeAllMCSubtargetInfos();
InitializeAllAsmPrinters(); InitializeAllAsmPrinters();
InitializeAllAsmParsers(); InitializeAllAsmParsers();
InitializeAllDisassemblers(); InitializeAllDisassemblers();
@ -178,6 +175,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU, TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
featureString)); featureString));
// FIXME: It shouldn't be using TargetRegisterInfo!
const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo(); const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
if (!registerInfo) if (!registerInfo)

46
lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
View File

@ -98,36 +98,18 @@ MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
// Force static initialization.
extern "C" void LLVMInitializeARMMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
ARM_MC::createARMMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
ARM_MC::createARMMCSubtargetInfo);
}
static MCInstrInfo *createARMMCInstrInfo() { static MCInstrInfo *createARMMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo(); MCInstrInfo *X = new MCInstrInfo();
InitARMMCInstrInfo(X); InitARMMCInstrInfo(X);
return X; return X;
} }
extern "C" void LLVMInitializeARMMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
}
static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) { static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitARMMCRegisterInfo(X, ARM::LR); InitARMMCRegisterInfo(X, ARM::LR);
return X; return X;
} }
extern "C" void LLVMInitializeARMMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
}
static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
@ -137,12 +119,6 @@ static MCAsmInfo *createARMMCAsmInfo(const Target &T, StringRef TT) {
return new ARMELFMCAsmInfo(); return new ARMELFMCAsmInfo();
} }
extern "C" void LLVMInitializeARMMCAsmInfo() {
// Register the target asm info.
RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
}
MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -152,7 +128,27 @@ MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeARMMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeARMTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo);
RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo);
TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheARMTarget, createARMMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheThumbTarget, createARMMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheARMTarget, createARMMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheThumbTarget, createARMMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheARMTarget,
ARM_MC::createARMMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(TheThumbTarget,
ARM_MC::createARMMCSubtargetInfo);
} }

35
lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp
View File

@ -36,20 +36,12 @@ static MCInstrInfo *createAlphaMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeAlphaMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
}
static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createAlphaMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitAlphaMCRegisterInfo(X, Alpha::R26); InitAlphaMCRegisterInfo(X, Alpha::R26);
return X; return X;
} }
extern "C" void LLVMInitializeAlphaMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
}
static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -57,15 +49,6 @@ static MCSubtargetInfo *createAlphaMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeAlphaMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
createAlphaMCSubtargetInfo);
}
extern "C" void LLVMInitializeAlphaMCAsmInfo() {
RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget);
}
MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -73,8 +56,22 @@ MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeAlphaMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeAlphaTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget, TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget,
createAlphaMCCodeGenInfo); createAlphaMCCodeGenInfo);
}
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheAlphaTarget, createAlphaMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheAlphaTarget, createAlphaMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheAlphaTarget,
createAlphaMCSubtargetInfo);
}

38
lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp
View File

@ -36,22 +36,12 @@ static MCInstrInfo *createBlackfinMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeBlackfinMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
createBlackfinMCInstrInfo);
}
static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createBlackfinMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitBlackfinMCRegisterInfo(X, BF::RETS); InitBlackfinMCRegisterInfo(X, BF::RETS);
return X; return X;
} }
extern "C" void LLVMInitializeBlackfinMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
createBlackfinMCRegisterInfo);
}
static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT, static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
StringRef CPU, StringRef CPU,
StringRef FS) { StringRef FS) {
@ -60,15 +50,6 @@ static MCSubtargetInfo *createBlackfinMCSubtargetInfo(StringRef TT,
return X; return X;
} }
extern "C" void LLVMInitializeBlackfinMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
createBlackfinMCSubtargetInfo);
}
extern "C" void LLVMInitializeBlackfinMCAsmInfo() {
RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget);
}
MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -76,7 +57,24 @@ MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeBlackfinMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeBlackfinTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget, TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget,
createBlackfinMCCodeGenInfo); createBlackfinMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheBlackfinTarget,
createBlackfinMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheBlackfinTarget,
createBlackfinMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheBlackfinTarget,
createBlackfinMCSubtargetInfo);
} }

10
lib/Target/CBackend/CBackend.cpp
View File

@ -64,15 +64,7 @@ extern "C" void LLVMInitializeCBackendTarget() {
RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget); RegisterTargetMachine<CTargetMachine> X(TheCBackendTarget);
} }
extern "C" void LLVMInitializeCBackendMCAsmInfo() {} extern "C" void LLVMInitializeCBackendTargetMC() {}
extern "C" void LLVMInitializeCBackendMCRegisterInfo() {}
extern "C" void LLVMInitializeCBackendMCInstrInfo() {}
extern "C" void LLVMInitializeCBackendMCSubtargetInfo() {}
extern "C" void LLVMInitializeCBackendMCCodeGenInfo() {}
namespace { namespace {
class CBEMCAsmInfo : public MCAsmInfo { class CBEMCAsmInfo : public MCAsmInfo {

36
lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp
View File

@ -36,21 +36,12 @@ static MCInstrInfo *createSPUMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeCellSPUMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
}
static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitSPUMCRegisterInfo(X, SPU::R0); InitSPUMCRegisterInfo(X, SPU::R0);
return X; return X;
} }
extern "C" void LLVMInitializeCellSPUMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
createCellSPUMCRegisterInfo);
}
static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -58,11 +49,6 @@ static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeCellSPUMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
createSPUMCSubtargetInfo);
}
static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT); MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT);
@ -74,10 +60,6 @@ static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
return MAI; return MAI;
} }
extern "C" void LLVMInitializeCellSPUMCAsmInfo() {
RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
}
MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -87,7 +69,23 @@ MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeCellSPUMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeCellSPUTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget, TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget,
createSPUMCCodeGenInfo); createSPUMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
createCellSPUMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
createSPUMCSubtargetInfo);
} }

10
lib/Target/CppBackend/CPPBackend.cpp
View File

@ -77,15 +77,7 @@ extern "C" void LLVMInitializeCppBackendTarget() {
RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget); RegisterTargetMachine<CPPTargetMachine> X(TheCppBackendTarget);
} }
extern "C" void LLVMInitializeCppBackendMCAsmInfo() {} extern "C" void LLVMInitializeCppBackendTargetMC() {}
extern "C" void LLVMInitializeCppBackendMCRegisterInfo() {}
extern "C" void LLVMInitializeCppBackendMCInstrInfo() {}
extern "C" void LLVMInitializeCppBackendMCSubtargetInfo() {}
extern "C" void LLVMInitializeCppBackendMCCodeGenInfo() {}
namespace { namespace {
typedef std::vector<Type*> TypeList; typedef std::vector<Type*> TypeList;

36
lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp
View File

@ -36,21 +36,12 @@ static MCInstrInfo *createMBlazeMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeMBlazeMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
}
static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createMBlazeMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitMBlazeMCRegisterInfo(X, MBlaze::R15); InitMBlazeMCRegisterInfo(X, MBlaze::R15);
return X; return X;
} }
extern "C" void LLVMInitializeMBlazeMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
createMBlazeMCRegisterInfo);
}
static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -58,11 +49,6 @@ static MCSubtargetInfo *createMBlazeMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeMBlazeMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
createMBlazeMCSubtargetInfo);
}
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
switch (TheTriple.getOS()) { switch (TheTriple.getOS()) {
@ -71,10 +57,6 @@ static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
} }
} }
extern "C" void LLVMInitializeMBlazeMCAsmInfo() {
RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
}
MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -86,7 +68,23 @@ MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeMBlazeMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeMBlazeTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget, TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget,
createMBlazeMCCodeGenInfo); createMBlazeMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheMBlazeTarget, createMBlazeMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMBlazeTarget,
createMBlazeMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMBlazeTarget,
createMBlazeMCSubtargetInfo);
} }

36
lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
View File

@ -35,22 +35,12 @@ static MCInstrInfo *createMSP430MCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeMSP430MCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
}
static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) { static MCRegisterInfo *createMSP430MCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitMSP430MCRegisterInfo(X, MSP430::PCW); InitMSP430MCRegisterInfo(X, MSP430::PCW);
return X; return X;
} }
extern "C" void LLVMInitializeMSP430MCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
createMSP430MCRegisterInfo);
}
static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -58,15 +48,6 @@ static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeMSP430MCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
createMSP430MCSubtargetInfo);
}
extern "C" void LLVMInitializeMSP430MCAsmInfo() {
RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
}
MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -74,7 +55,22 @@ MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeMSP430MCCodeGenInfo() { extern "C" void LLVMInitializeMSP430TargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target, TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target,
createMSP430MCCodeGenInfo); createMSP430MCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
createMSP430MCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
createMSP430MCSubtargetInfo);
} }

37
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -36,21 +36,12 @@ static MCInstrInfo *createMipsMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeMipsMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
}
static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitMipsMCRegisterInfo(X, Mips::RA); InitMipsMCRegisterInfo(X, Mips::RA);
return X; return X;
} }
extern "C" void LLVMInitializeMipsMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
}
static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -58,11 +49,6 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeMipsMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
createMipsMCSubtargetInfo);
}
static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT); MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT);
@ -73,11 +59,6 @@ static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) {
return MAI; return MAI;
} }
extern "C" void LLVMInitializeMipsMCAsmInfo() {
RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
}
MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -93,9 +74,25 @@ MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeMipsMCCodeGenInfo() { extern "C" void LLVMInitializeMipsTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
createMipsMCCodeGenInfo); createMipsMCCodeGenInfo);
TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
createMipsMCCodeGenInfo); createMipsMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
createMipsMCSubtargetInfo);
} }

43
lib/Target/PTX/MCTargetDesc/PTXMCTargetDesc.cpp
View File

@ -35,11 +35,6 @@ static MCInstrInfo *createPTXMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializePTXMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
}
static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
// PTX does not have a return address register. // PTX does not have a return address register.
@ -47,11 +42,6 @@ static MCRegisterInfo *createPTXMCRegisterInfo(StringRef TT) {
return X; return X;
} }
extern "C" void LLVMInitializePTXMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
}
static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -59,18 +49,6 @@ static MCSubtargetInfo *createPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializePTXMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
createPTXMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
createPTXMCSubtargetInfo);
}
extern "C" void LLVMInitializePTXMCAsmInfo() {
RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
}
MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -78,7 +56,26 @@ MCCodeGenInfo *createPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializePTXMCCodeGenInfo() { extern "C" void LLVMInitializePTXTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<PTXMCAsmInfo> X(ThePTX32Target);
RegisterMCAsmInfo<PTXMCAsmInfo> Y(ThePTX64Target);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePTX32Target, createPTXMCCodeGenInfo);
TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePTX64Target, createPTXMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(ThePTX32Target, createPTXMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(ThePTX64Target, createPTXMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(ThePTX32Target, createPTXMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(ThePTX64Target, createPTXMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(ThePTX32Target,
createPTXMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(ThePTX64Target,
createPTXMCSubtargetInfo);
} }

43
lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
View File

@ -36,11 +36,6 @@ static MCInstrInfo *createPPCMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializePowerPCMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
}
static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
bool isPPC64 = (TheTriple.getArch() == Triple::ppc64); bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
@ -52,11 +47,6 @@ static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
return X; return X;
} }
extern "C" void LLVMInitializePowerPCMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
}
static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -64,13 +54,6 @@ static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializePowerPCMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
createPPCMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
createPPCMCSubtargetInfo);
}
static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
bool isPPC64 = TheTriple.getArch() == Triple::ppc64; bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
@ -89,11 +72,6 @@ static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
return MAI; return MAI;
} }
extern "C" void LLVMInitializePowerPCMCAsmInfo() {
RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
}
MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -109,7 +87,26 @@ MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializePowerPCMCCodeGenInfo() { extern "C" void LLVMInitializePowerPCTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo); TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
createPPCMCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
createPPCMCSubtargetInfo);
} }

36
lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
View File

@ -35,20 +35,12 @@ static MCInstrInfo *createSparcMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeSparcMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
}
static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitSparcMCRegisterInfo(X, SP::I7); InitSparcMCRegisterInfo(X, SP::I7);
return X; return X;
} }
extern "C" void LLVMInitializeSparcMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
}
static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -56,16 +48,6 @@ static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeSparcMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
createSparcMCSubtargetInfo);
}
extern "C" void LLVMInitializeSparcMCAsmInfo() {
RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
}
MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -73,10 +55,24 @@ MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeSparcMCCodeGenInfo() { extern "C" void LLVMInitializeSparcTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget, TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
createSparcMCCodeGenInfo); createSparcMCCodeGenInfo);
TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target, TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
createSparcMCCodeGenInfo); createSparcMCCodeGenInfo);
}
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheSparcTarget, createSparcMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheSparcTarget, createSparcMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheSparcTarget,
createSparcMCSubtargetInfo);
}

37
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
View File

@ -35,22 +35,12 @@ static MCInstrInfo *createSystemZMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeSystemZMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
createSystemZMCInstrInfo);
}
static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitSystemZMCRegisterInfo(X, 0); InitSystemZMCRegisterInfo(X, 0);
return X; return X;
} }
extern "C" void LLVMInitializeSystemZMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
createSystemZMCRegisterInfo);
}
static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT, static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
StringRef CPU, StringRef CPU,
StringRef FS) { StringRef FS) {
@ -59,15 +49,6 @@ static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
return X; return X;
} }
extern "C" void LLVMInitializeSystemZMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
createSystemZMCSubtargetInfo);
}
extern "C" void LLVMInitializeSystemZMCAsmInfo() {
RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget);
}
MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -77,7 +58,23 @@ MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeSystemZMCCodeGenInfo() { extern "C" void LLVMInitializeSystemZTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfo<SystemZMCAsmInfo> X(TheSystemZTarget);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget, TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
createSystemZMCCodeGenInfo); createSystemZMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
createSystemZMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
createSystemZMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
createSystemZMCSubtargetInfo);
} }

52
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
View File

@ -261,25 +261,12 @@ MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
// Force static initialization.
extern "C" void LLVMInitializeX86MCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
X86_MC::createX86MCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
X86_MC::createX86MCSubtargetInfo);
}
static MCInstrInfo *createX86MCInstrInfo() { static MCInstrInfo *createX86MCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo(); MCInstrInfo *X = new MCInstrInfo();
InitX86MCInstrInfo(X); InitX86MCInstrInfo(X);
return X; return X;
} }
extern "C" void LLVMInitializeX86MCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
}
static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) { static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
unsigned RA = (TheTriple.getArch() == Triple::x86_64) unsigned RA = (TheTriple.getArch() == Triple::x86_64)
@ -294,12 +281,6 @@ static MCRegisterInfo *createX86MCRegisterInfo(StringRef TT) {
return X; return X;
} }
extern "C" void LLVMInitializeX86MCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
}
static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
bool is64Bit = TheTriple.getArch() == Triple::x86_64; bool is64Bit = TheTriple.getArch() == Triple::x86_64;
@ -333,12 +314,6 @@ static MCAsmInfo *createX86MCAsmInfo(const Target &T, StringRef TT) {
return MAI; return MAI;
} }
extern "C" void LLVMInitializeX86MCAsmInfo() {
// Register the target asm info.
RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
}
MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -388,8 +363,27 @@ MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeX86MCCodeGenInfo() { // Force static initialization.
// Register the target asm info. extern "C" void LLVMInitializeX86TargetMC() {
RegisterMCCodeGenInfoFn A(TheX86_32Target, createX86MCCodeGenInfo); // Register the MC asm info.
RegisterMCCodeGenInfoFn B(TheX86_64Target, createX86MCCodeGenInfo); RegisterMCAsmInfoFn A(TheX86_32Target, createX86MCAsmInfo);
RegisterMCAsmInfoFn B(TheX86_64Target, createX86MCAsmInfo);
// Register the MC codegen info.
RegisterMCCodeGenInfoFn C(TheX86_32Target, createX86MCCodeGenInfo);
RegisterMCCodeGenInfoFn D(TheX86_64Target, createX86MCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheX86_32Target, createX86MCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheX86_64Target, createX86MCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo);
TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheX86_32Target,
X86_MC::createX86MCSubtargetInfo);
TargetRegistry::RegisterMCSubtargetInfo(TheX86_64Target,
X86_MC::createX86MCSubtargetInfo);
} }

34
lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
View File

@ -35,20 +35,12 @@ static MCInstrInfo *createXCoreMCInstrInfo() {
return X; return X;
} }
extern "C" void LLVMInitializeXCoreMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
}
static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) { static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
MCRegisterInfo *X = new MCRegisterInfo(); MCRegisterInfo *X = new MCRegisterInfo();
InitXCoreMCRegisterInfo(X, XCore::LR); InitXCoreMCRegisterInfo(X, XCore::LR);
return X; return X;
} }
extern "C" void LLVMInitializeXCoreMCRegisterInfo() {
TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
}
static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU, static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) { StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo(); MCSubtargetInfo *X = new MCSubtargetInfo();
@ -56,11 +48,6 @@ static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
return X; return X;
} }
extern "C" void LLVMInitializeXCoreMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
createXCoreMCSubtargetInfo);
}
static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT); MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
@ -72,10 +59,6 @@ static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
return MAI; return MAI;
} }
extern "C" void LLVMInitializeXCoreMCAsmInfo() {
RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
}
MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
CodeModel::Model CM) { CodeModel::Model CM) {
MCCodeGenInfo *X = new MCCodeGenInfo(); MCCodeGenInfo *X = new MCCodeGenInfo();
@ -83,7 +66,22 @@ MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
return X; return X;
} }
extern "C" void LLVMInitializeXCoreMCCodeGenInfo() { // Force static initialization.
extern "C" void LLVMInitializeXCoreTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget, TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
createXCoreMCCodeGenInfo); createXCoreMCCodeGenInfo);
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
createXCoreMCSubtargetInfo);
} }

4
tools/llc/llc.cpp
View File

@ -232,9 +232,7 @@ int main(int argc, char **argv) {
// Initialize targets first, so that --version shows registered targets. // Initialize targets first, so that --version shows registered targets.
InitializeAllTargets(); InitializeAllTargets();
InitializeAllMCAsmInfos(); InitializeAllTargetMCs();
InitializeAllMCCodeGenInfos();
InitializeAllMCSubtargetInfos();
InitializeAllAsmPrinters(); InitializeAllAsmPrinters();
InitializeAllAsmParsers(); InitializeAllAsmParsers();

6
tools/llvm-mc/llvm-mc.cpp
View File

@ -454,11 +454,7 @@ int main(int argc, char **argv) {
llvm::InitializeAllTargetInfos(); llvm::InitializeAllTargetInfos();
// FIXME: We shouldn't need to initialize the Target(Machine)s. // FIXME: We shouldn't need to initialize the Target(Machine)s.
llvm::InitializeAllTargets(); llvm::InitializeAllTargets();
llvm::InitializeAllMCAsmInfos(); llvm::InitializeAllTargetMCs();
llvm::InitializeAllMCCodeGenInfos();
llvm::InitializeAllMCInstrInfos();
llvm::InitializeAllMCRegisterInfos();
llvm::InitializeAllMCSubtargetInfos();
llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers(); llvm::InitializeAllAsmParsers();
llvm::InitializeAllDisassemblers(); llvm::InitializeAllDisassemblers();

4
tools/llvm-objdump/llvm-objdump.cpp
View File

@ -310,9 +310,7 @@ int main(int argc, char **argv) {
llvm::InitializeAllTargetInfos(); llvm::InitializeAllTargetInfos();
// FIXME: We shouldn't need to initialize the Target(Machine)s. // FIXME: We shouldn't need to initialize the Target(Machine)s.
llvm::InitializeAllTargets(); llvm::InitializeAllTargets();
llvm::InitializeAllMCAsmInfos(); llvm::InitializeAllTargetMCs();
llvm::InitializeAllMCCodeGenInfos();
llvm::InitializeAllMCInstrInfos();
llvm::InitializeAllAsmPrinters(); llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers(); llvm::InitializeAllAsmParsers();
llvm::InitializeAllDisassemblers(); llvm::InitializeAllDisassemblers();

5
tools/lto/LTOCodeGenerator.cpp
View File

@ -74,10 +74,7 @@ LTOCodeGenerator::LTOCodeGenerator()
_nativeObjectFile(NULL) _nativeObjectFile(NULL)
{ {
InitializeAllTargets(); InitializeAllTargets();
InitializeAllMCAsmInfos(); InitializeAllTargetMCs();
InitializeAllMCCodeGenInfos();
InitializeAllMCRegisterInfos();
InitializeAllMCSubtargetInfos();
InitializeAllAsmPrinters(); InitializeAllAsmPrinters();
} }

4
tools/lto/LTOModule.cpp
View File

@ -136,9 +136,7 @@ LTOModule *LTOModule::makeLTOModule(MemoryBuffer *buffer,
static bool Initialized = false; static bool Initialized = false;
if (!Initialized) { if (!Initialized) {
InitializeAllTargets(); InitializeAllTargets();
InitializeAllMCCodeGenInfos(); InitializeAllTargetMCs();
InitializeAllMCAsmInfos();
InitializeAllMCSubtargetInfos();
InitializeAllAsmParsers(); InitializeAllAsmParsers();
Initialized = true; Initialized = true;
} }