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Remove a temporary workaround for a lencod miscompile. Depends on the fix in r124442.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124443 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2011-01-27 21:28:51 +00:00
parent 5d7ab8503b
commit e787ddb510
1 changed files with 0 additions and 2 deletions
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2
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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@ -1645,13 +1645,11 @@ bool RegReductionPQBase::HighRegPressure(const SUnit *SU) const {
// NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only
// counts data deps. To be more precise, we could maintain a
// NumDataSuccsLeft count.
/* FIXME: exposing a downstream bug, JM/lencode miscompile
if (PredSU->NumSuccsLeft != PredSU->Succs.size()) {
DEBUG(dbgs() << " SU(" << PredSU->NodeNum << ") live across SU("
<< SU->NodeNum << ")\n");
continue;
}
*/
const SDNode *PN = PredSU->getNode();
if (!PN->isMachineOpcode()) {
if (PN->getOpcode() == ISD::CopyFromReg) {