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Sparc: Add support for indirect branch and blockaddress in Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183094 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -120,6 +120,9 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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case MachineOperand::MO_GlobalAddress:
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O << *Mang->getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_BlockAddress:
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O << GetBlockAddressSymbol(MO.getBlockAddress())->getName();
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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break;
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@ -1258,6 +1258,7 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::GlobalAddress, getPointerTy(), Custom);
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setOperationAction(ISD::GlobalTLSAddress, getPointerTy(), Custom);
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setOperationAction(ISD::ConstantPool, getPointerTy(), Custom);
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setOperationAction(ISD::BlockAddress, getPointerTy(), Custom);
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// Sparc doesn't have sext_inreg, replace them with shl/sra
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setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
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@ -1460,6 +1461,12 @@ SDValue SparcTargetLowering::withTargetFlags(SDValue Op, unsigned TF,
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CP->getAlignment(),
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CP->getOffset(), TF);
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if (const BlockAddressSDNode *BA = dyn_cast<BlockAddressSDNode>(Op))
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return DAG.getTargetBlockAddress(BA->getBlockAddress(),
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Op.getValueType(),
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0,
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TF);
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if (const ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Op))
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return DAG.getTargetExternalSymbol(ES->getSymbol(),
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ES->getValueType(0), TF);
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@ -1530,6 +1537,11 @@ SDValue SparcTargetLowering::LowerConstantPool(SDValue Op,
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return makeAddress(Op, DAG);
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}
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SDValue SparcTargetLowering::LowerBlockAddress(SDValue Op,
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SelectionDAG &DAG) const {
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return makeAddress(Op, DAG);
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}
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static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) {
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SDLoc dl(Op);
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// Convert the fp value to integer in an FP register.
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@ -1752,6 +1764,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::GlobalTLSAddress:
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llvm_unreachable("TLS not implemented for Sparc.");
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case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
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case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
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case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
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case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
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case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG);
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@ -120,6 +120,7 @@ namespace llvm {
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
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unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const;
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SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const;
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@ -516,6 +516,20 @@ let isBarrier = 1 in
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"ba $dst",
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[(br bb:$dst)]>;
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//Indirect Branch
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let isTerminator = 1, isBarrier = 1,
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hasDelaySlot = 1, isBranch =1,
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isIndirectBranch = 1 in {
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def BINDrr : F3_1<2, 0b111000,
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(outs), (ins MEMrr:$ptr),
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"jmp $ptr",
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[(brind ADDRrr:$ptr)]>;
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def BINDri : F3_2<2, 0b111000,
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(outs), (ins MEMri:$ptr),
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"jmp $ptr",
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[(brind ADDRri:$ptr)]>;
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}
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// FIXME: the encoding for the JIT should look at the condition field.
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let Uses = [ICC] in
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def BCOND : BranchSP<0, (ins brtarget:$dst, CCOp:$cc),
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@ -793,9 +807,15 @@ def : Pat<(SPlo tglobaladdr:$in), (ORri (i32 G0), tglobaladdr:$in)>;
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def : Pat<(SPhi tconstpool:$in), (SETHIi tconstpool:$in)>;
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def : Pat<(SPlo tconstpool:$in), (ORri (i32 G0), tconstpool:$in)>;
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// Blockaddress
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def : Pat<(SPhi tblockaddress:$in), (SETHIi tblockaddress:$in)>;
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def : Pat<(SPlo tblockaddress:$in), (ORri (i32 G0), tblockaddress:$in)>;
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// Add reg, lo. This is used when taking the addr of a global/constpool entry.
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def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDri $r, tglobaladdr:$in)>;
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def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDri $r, tconstpool:$in)>;
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def : Pat<(add iPTR:$r, (SPlo tblockaddress:$in)),
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(ADDri $r, tblockaddress:$in)>;
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// Calls:
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def : Pat<(call tglobaladdr:$dst),
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77
test/CodeGen/SPARC/blockaddr.ll
Normal file
77
test/CodeGen/SPARC/blockaddr.ll
Normal file
@ -0,0 +1,77 @@
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; RUN: llc < %s -march=sparc -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=medium | FileCheck --check-prefix=abs44 %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=large | FileCheck --check-prefix=abs64 %s
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; RUN: llc < %s -march=sparc -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v8pic32 %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v9pic32 %s
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;
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; copied from test/CodeGen/Mips/blockaddr.ll and modified for SPARC
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;
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@reg = common global i8* null, align 4
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define i8* @dummy(i8* %x) nounwind readnone noinline {
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entry:
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ret i8* %x
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}
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; abs32: func_block_addr:
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; abs32: sethi %hi([[BLK:.+]]), [[R:%[gilo][0-7]]]
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; abs32: call dummy
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; abs32: add [[R]], %lo([[BLK]]), %o0
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; abs32: jmp %o0
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; abs44: func_block_addr:
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; abs44: sethi %h44([[BLK:.+]]), [[R:%[gilo][0-7]]]
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; abs44: add [[R]], %m44([[BLK]]), [[R1:%[gilo][0-7]]]
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; abs44: sllx [[R1]], 12, [[R2:%[gilo][0-7]]]
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; abs44: call dummy
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; abs44: add [[R2]], %l44([[BLK]]), %o0
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; abs44: jmp %o0
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; abs64: func_block_addr:
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; abs64: sethi %hi([[BLK:.+]]), [[R:%[gilo][0-7]]]
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; abs64: add [[R]], %lo([[BLK]]), [[R1:%[gilo][0-7]]]
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; abs64: sethi %hh([[BLK]]), [[R2:%[gilo][0-7]]]
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; abs64: add [[R2]], %hm([[BLK]]), [[R3:%[gilo][0-7]]]
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; abs64: sllx [[R3]], 32, [[R4:%[gilo][0-7]]]
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; abs64: call dummy
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; abs64: add [[R2]], [[R1]], %o0
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; abs64: jmp %o0
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; v8pic32: func_block_addr
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; v8pic32: sethi %hi(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R:%[gilo][0-7]]]
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; v8pic32: or [[R]], %lo(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R1:%[gilo][0-7]]]
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; v8pic32: add [[R1]], %o7, %[[R2:[gilo][0-7]]]
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; v8pic32: sethi %hi([[BLK:.+]]), [[R3:%[gilo][0-7]]]
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; v8pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]]
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; v8pic32: call dummy
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; v8pic32: ld [%[[R2]]+%[[R4]]], %o0
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; v8pic32: jmp %o0
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; v9pic32: func_block_addr
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; v9pic32: sethi %hi(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R:%[gilo][0-7]]]
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; v9pic32: or [[R]], %lo(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R1:%[gilo][0-7]]]
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; v9pic32: add [[R1]], %o7, %[[R2:[gilo][0-7]]]
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; v9pic32: sethi %hi([[BLK:.+]]), [[R3:%[gilo][0-7]]]
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; v9pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]]
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; v9pic32: call dummy
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; v9pic32: ldx [%[[R2]]+%[[R4]]], %o0
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; v9pic32: jmp %o0
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define void @func_block_addr() nounwind {
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entry:
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%call = tail call i8* @dummy(i8* blockaddress(@func_block_addr, %baz))
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indirectbr i8* %call, [label %baz, label %foo]
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foo: ; preds = %foo, %entry
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store i8* blockaddress(@func_block_addr, %foo), i8** @reg, align 4
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br label %foo
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baz: ; preds = %entry
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store i8* null, i8** @reg, align 4
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ret void
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}
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