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Fix the mneumonics for the mov instructions to have the source and destination

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order in the correct sense!! Arg!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11530 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2004-02-17 06:28:19 +00:00
parent 7ddc3fbd22
commit e87331d11d
6 changed files with 81 additions and 81 deletions
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8
lib/Target/X86/PeepholeOptimizer.cpp
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@@ -460,7 +460,7 @@ bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
switch (MI->getOpcode()) {
// Register to memory stores. Format: <base,scale,indexreg,immdisp>, srcreg
case X86::MOVrm32: case X86::MOVrm16: case X86::MOVrm8:
case X86::MOVmr32: case X86::MOVmr16: case X86::MOVmr8:
case X86::MOVmi32: case X86::MOVmi16: case X86::MOVmi8:
// Check to see if we can fold the source instruction into this one...
if (MachineInstr *SrcInst = getDefiningInst(MI->getOperand(4))) {
@@ -478,9 +478,9 @@ bool SSAPH::PeepholeOptimize(MachineBasicBlock &MBB,
return true;
break;
case X86::MOVmr32:
case X86::MOVmr16:
case X86::MOVmr8:
case X86::MOVrm32:
case X86::MOVrm16:
case X86::MOVrm8:
// If we can optimize the addressing expression, do so now.
if (OptimizeAddress(MI, 1))
return true;