mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
Add option to join live intervals. Two intervals are joined if there
is a move between two registers, at least one of the registers is virtual and the two live intervals do not overlap. This results in about 40% reduction in intervals, 30% decrease in the register allocators running time and a 20% increase in peephole optimizations (mainly move eliminations). The option can be enabled by passing -join-liveintervals where appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10965 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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8abff7945a
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@ -26,6 +26,7 @@
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#include <iostream>
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#include <list>
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#include <map>
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#include <vector>
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namespace llvm {
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@ -39,10 +40,9 @@ namespace llvm {
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typedef std::pair<unsigned, unsigned> Range;
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typedef std::vector<Range> Ranges;
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unsigned reg; // the register of this interval
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unsigned hint;
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float weight; // weight of this interval (number of uses
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// * 10^loopDepth)
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Ranges ranges; // the ranges this register is valid
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Ranges ranges; // the ranges in which this register is live
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Interval(unsigned r);
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@ -66,10 +66,12 @@ namespace llvm {
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void addRange(unsigned start, unsigned end);
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private:
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void mergeRangesForward(Ranges::iterator it);
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void join(const Interval& other);
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void mergeRangesBackward(Ranges::iterator it);
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private:
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Ranges::iterator mergeRangesForward(Ranges::iterator it);
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Ranges::iterator mergeRangesBackward(Ranges::iterator it);
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};
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struct StartPointComp {
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@ -85,6 +87,7 @@ namespace llvm {
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};
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typedef std::list<Interval> Intervals;
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typedef std::map<unsigned, unsigned> Reg2RegMap;
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typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
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private:
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@ -104,11 +107,15 @@ namespace llvm {
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typedef std::map<unsigned, Intervals::iterator> Reg2IntervalMap;
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Reg2IntervalMap r2iMap_;
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Reg2RegMap r2rMap_;
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Intervals intervals_;
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public:
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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Intervals& getIntervals() { return intervals_; }
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MachineBasicBlockPtrs getOrderedMachineBasicBlockPtrs() const {
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MachineBasicBlockPtrs result;
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for (MbbIndex2MbbMap::const_iterator
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@ -119,6 +126,13 @@ namespace llvm {
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return result;
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}
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const Reg2RegMap& getJoinedRegMap() const {
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return r2rMap_;
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}
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/// rep - returns the representative of this register
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unsigned rep(unsigned reg);
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private:
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/// runOnMachineFunction - pass entry point
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bool runOnMachineFunction(MachineFunction&);
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@ -126,6 +140,8 @@ namespace llvm {
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/// computeIntervals - compute live intervals
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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@ -26,6 +26,7 @@
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#include <iostream>
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#include <list>
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#include <map>
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#include <vector>
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namespace llvm {
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@ -39,10 +40,9 @@ namespace llvm {
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typedef std::pair<unsigned, unsigned> Range;
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typedef std::vector<Range> Ranges;
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unsigned reg; // the register of this interval
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unsigned hint;
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float weight; // weight of this interval (number of uses
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// * 10^loopDepth)
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Ranges ranges; // the ranges this register is valid
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Ranges ranges; // the ranges in which this register is live
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Interval(unsigned r);
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@ -66,10 +66,12 @@ namespace llvm {
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void addRange(unsigned start, unsigned end);
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private:
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void mergeRangesForward(Ranges::iterator it);
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void join(const Interval& other);
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void mergeRangesBackward(Ranges::iterator it);
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private:
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Ranges::iterator mergeRangesForward(Ranges::iterator it);
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Ranges::iterator mergeRangesBackward(Ranges::iterator it);
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};
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struct StartPointComp {
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@ -85,6 +87,7 @@ namespace llvm {
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};
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typedef std::list<Interval> Intervals;
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typedef std::map<unsigned, unsigned> Reg2RegMap;
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typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
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private:
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@ -104,11 +107,15 @@ namespace llvm {
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typedef std::map<unsigned, Intervals::iterator> Reg2IntervalMap;
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Reg2IntervalMap r2iMap_;
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Reg2RegMap r2rMap_;
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Intervals intervals_;
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public:
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virtual void getAnalysisUsage(AnalysisUsage &AU) const;
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Intervals& getIntervals() { return intervals_; }
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MachineBasicBlockPtrs getOrderedMachineBasicBlockPtrs() const {
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MachineBasicBlockPtrs result;
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for (MbbIndex2MbbMap::const_iterator
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@ -119,6 +126,13 @@ namespace llvm {
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return result;
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}
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const Reg2RegMap& getJoinedRegMap() const {
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return r2rMap_;
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}
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/// rep - returns the representative of this register
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unsigned rep(unsigned reg);
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private:
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/// runOnMachineFunction - pass entry point
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bool runOnMachineFunction(MachineFunction&);
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@ -126,6 +140,8 @@ namespace llvm {
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/// computeIntervals - compute live intervals
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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void joinIntervals();
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/// handleRegisterDef - update intervals for a register def
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/// (calls handlePhysicalRegisterDef and
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@ -30,6 +30,7 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegInfo.h"
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#include "llvm/Support/CFG.h"
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#include "Support/CommandLine.h"
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#include "Support/Debug.h"
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#include "Support/DepthFirstIterator.h"
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#include "Support/Statistic.h"
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@ -44,6 +45,11 @@ namespace {
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"Live Interval Analysis");
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Statistic<> numIntervals("liveintervals", "Number of intervals");
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cl::opt<bool>
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join("join-liveintervals",
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cl::desc("Join compatible live intervals"),
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cl::init(false));
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};
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void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
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@ -69,6 +75,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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mi2iMap_.clear();
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r2iMap_.clear();
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r2iMap_.clear();
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r2rMap_.clear();
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intervals_.clear();
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// number MachineInstrs
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@ -95,18 +102,17 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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const LoopInfo& loopInfo = getAnalysis<LoopInfo>();
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const TargetInstrInfo& tii = tm_->getInstrInfo();
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for (MbbIndex2MbbMap::iterator
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it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
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it != itEnd; ++it) {
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MachineBasicBlock* mbb = it->second;
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for (MachineFunction::const_iterator mbbi = mf_->begin(),
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mbbe = mf_->end(); mbbi != mbbe; ++mbbi) {
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const MachineBasicBlock* mbb = mbbi;
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unsigned loopDepth = loopInfo.getLoopDepth(mbb->getBasicBlock());
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for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
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mi != miEnd; ++mi) {
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MachineInstr* instr = *mi;
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for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand& mop = instr->getOperand(i);
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for (MachineBasicBlock::const_iterator mii = mbb->begin(),
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mie = mbb->end(); mii != mie; ++mii) {
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MachineInstr* mi = *mii;
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for (int i = mi->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand& mop = mi->getOperand(i);
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if (!mop.isVirtualRegister())
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continue;
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@ -119,6 +125,9 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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}
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}
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// join intervals if requested
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if (join) joinIntervals();
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numIntervals += intervals_.size();
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return true;
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@ -326,48 +335,111 @@ void LiveIntervals::computeIntervals()
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std::ostream_iterator<Interval>(std::cerr, "\n")));
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}
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unsigned LiveIntervals::rep(unsigned reg)
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{
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Reg2RegMap::iterator it = r2rMap_.find(reg);
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if (it != r2rMap_.end())
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return it->second = rep(it->second);
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return reg;
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}
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void LiveIntervals::joinIntervals()
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{
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DEBUG(std::cerr << "joining compatible intervals:\n");
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const TargetInstrInfo& tii = tm_->getInstrInfo();
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for (MachineFunction::const_iterator mbbi = mf_->begin(),
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mbbe = mf_->end(); mbbi != mbbe; ++mbbi) {
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const MachineBasicBlock* mbb = mbbi;
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DEBUG(std::cerr << "machine basic block: "
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<< mbb->getBasicBlock()->getName() << "\n");
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for (MachineBasicBlock::const_iterator mii = mbb->begin(),
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mie = mbb->end(); mii != mie; ++mii) {
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MachineInstr* mi = *mii;
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const TargetInstrDescriptor& tid =
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tm_->getInstrInfo().get(mi->getOpcode());
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DEBUG(std::cerr << "\t\tinstruction["
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<< getInstructionIndex(mi) << "]: ";
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mi->print(std::cerr, *tm_););
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unsigned srcReg, dstReg;
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if (tii.isMoveInstr(*mi, srcReg, dstReg) &&
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(srcReg >= MRegisterInfo::FirstVirtualRegister ||
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lv_->getAllocatablePhysicalRegisters()[srcReg]) &&
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(dstReg >= MRegisterInfo::FirstVirtualRegister ||
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lv_->getAllocatablePhysicalRegisters()[dstReg])) {
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// get representative registers
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srcReg = rep(srcReg);
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dstReg = rep(dstReg);
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// if they are already joined we continue
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if (srcReg == dstReg)
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continue;
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Reg2IntervalMap::iterator r2iSrc = r2iMap_.find(srcReg);
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assert(r2iSrc != r2iMap_.end());
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Reg2IntervalMap::iterator r2iDst = r2iMap_.find(dstReg);
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assert(r2iDst != r2iMap_.end());
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Intervals::iterator srcInt = r2iSrc->second;
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Intervals::iterator dstInt = r2iDst->second;
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if (srcInt->reg < MRegisterInfo::FirstVirtualRegister) {
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if (dstInt->reg == srcInt->reg ||
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(dstInt->reg >= MRegisterInfo::FirstVirtualRegister &&
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!dstInt->overlaps(*srcInt))) {
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srcInt->join(*dstInt);
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r2iDst->second = r2iSrc->second;
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r2rMap_.insert(std::make_pair(dstInt->reg, srcInt->reg));
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intervals_.erase(dstInt);
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}
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}
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else if (dstInt->reg < MRegisterInfo::FirstVirtualRegister) {
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if (srcInt->reg == dstInt->reg ||
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(srcInt->reg >= MRegisterInfo::FirstVirtualRegister &&
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!srcInt->overlaps(*dstInt))) {
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dstInt->join(*srcInt);
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r2iSrc->second = r2iDst->second;
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r2rMap_.insert(std::make_pair(srcInt->reg, dstInt->reg));
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intervals_.erase(srcInt);
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}
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}
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else {
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const TargetRegisterClass *srcRc, *dstRc;
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srcRc = mf_->getSSARegMap()->getRegClass(srcInt->reg);
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dstRc = mf_->getSSARegMap()->getRegClass(dstInt->reg);
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if (srcRc == dstRc && !dstInt->overlaps(*srcInt)) {
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srcInt->join(*dstInt);
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r2iDst->second = r2iSrc->second;
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r2rMap_.insert(std::make_pair(dstInt->reg, srcInt->reg));
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intervals_.erase(dstInt);
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}
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}
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}
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}
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}
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intervals_.sort(StartPointComp());
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DEBUG(std::copy(intervals_.begin(), intervals_.end(),
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std::ostream_iterator<Interval>(std::cerr, "\n")));
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DEBUG(for (Reg2RegMap::const_iterator i = r2rMap_.begin(),
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e = r2rMap_.end(); i != e; ++i)
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std::cerr << i->first << " -> " << i->second << '\n';);
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}
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LiveIntervals::Interval::Interval(unsigned r)
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: reg(r), hint(0),
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: reg(r),
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weight((r < MRegisterInfo::FirstVirtualRegister ?
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std::numeric_limits<float>::max() : 0.0F))
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{
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}
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void LiveIntervals::Interval::addRange(unsigned start, unsigned end)
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{
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DEBUG(std::cerr << "\t\t\tadding range: [" << start <<','<< end << ") -> ");
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//assert(start < end && "invalid range?");
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Range range = std::make_pair(start, end);
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Ranges::iterator it =
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ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range),
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range);
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mergeRangesForward(it);
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mergeRangesBackward(it);
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DEBUG(std::cerr << *this << '\n');
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}
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void LiveIntervals::Interval::mergeRangesForward(Ranges::iterator it)
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{
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for (Ranges::iterator next = it + 1;
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next != ranges.end() && it->second >= next->first; ) {
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it->second = std::max(it->second, next->second);
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next = ranges.erase(next);
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}
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}
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void LiveIntervals::Interval::mergeRangesBackward(Ranges::iterator it)
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{
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for (Ranges::iterator prev = it - 1;
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it != ranges.begin() && it->first <= prev->second; ) {
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it->first = std::min(it->first, prev->first);
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it->second = std::max(it->second, prev->second);
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it = ranges.erase(prev);
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prev = it - 1;
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}
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}
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bool LiveIntervals::Interval::liveAt(unsigned index) const
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{
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Ranges::const_iterator r = ranges.begin();
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@ -409,6 +481,63 @@ bool LiveIntervals::Interval::overlaps(const Interval& other) const
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return false;
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}
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void LiveIntervals::Interval::addRange(unsigned start, unsigned end)
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{
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DEBUG(std::cerr << "\t\t\tadding range: [" << start <<','<< end << ") -> ");
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//assert(start < end && "invalid range?");
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Range range = std::make_pair(start, end);
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Ranges::iterator it =
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ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range),
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range);
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it = mergeRangesForward(it);
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it = mergeRangesBackward(it);
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DEBUG(std::cerr << "\t\t\t\tafter merging: " << *this << '\n');
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}
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void LiveIntervals::Interval::join(const LiveIntervals::Interval& other)
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{
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DEBUG(std::cerr << "\t\t\t\tjoining intervals: "
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<< other << " and " << *this << '\n');
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Ranges::iterator cur = ranges.begin();
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for (Ranges::const_iterator i = other.ranges.begin(),
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e = other.ranges.end(); i != e; ++i) {
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cur = ranges.insert(std::upper_bound(cur, ranges.end(), *i), *i);
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cur = mergeRangesForward(cur);
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cur = mergeRangesBackward(cur);
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}
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if (reg >= MRegisterInfo::FirstVirtualRegister)
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weight += other.weight;
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DEBUG(std::cerr << "\t\t\t\tafter merging: " << *this << '\n');
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}
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LiveIntervals::Interval::Ranges::iterator
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LiveIntervals::Interval::mergeRangesForward(Ranges::iterator it)
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{
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for (Ranges::iterator next = it + 1;
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next != ranges.end() && it->second >= next->first; ) {
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it->second = std::max(it->second, next->second);
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next = ranges.erase(next);
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}
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return it;
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}
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LiveIntervals::Interval::Ranges::iterator
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LiveIntervals::Interval::mergeRangesBackward(Ranges::iterator it)
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{
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for (Ranges::iterator prev = it - 1;
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it != ranges.begin() && it->first <= prev->second; ) {
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it->first = std::min(it->first, prev->first);
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it->second = std::max(it->second, prev->second);
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it = ranges.erase(prev);
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prev = it - 1;
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}
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return it;
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}
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std::ostream& llvm::operator<<(std::ostream& os,
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const LiveIntervals::Interval& li)
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{
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@ -26,6 +26,7 @@
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#include <iostream>
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#include <list>
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#include <map>
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#include <vector>
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namespace llvm {
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@ -39,10 +40,9 @@ namespace llvm {
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typedef std::pair<unsigned, unsigned> Range;
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typedef std::vector<Range> Ranges;
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unsigned reg; // the register of this interval
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unsigned hint;
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float weight; // weight of this interval (number of uses
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// * 10^loopDepth)
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Ranges ranges; // the ranges this register is valid
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Ranges ranges; // the ranges in which this register is live
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Interval(unsigned r);
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@ -66,10 +66,12 @@ namespace llvm {
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void addRange(unsigned start, unsigned end);
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private:
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void mergeRangesForward(Ranges::iterator it);
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void join(const Interval& other);
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void mergeRangesBackward(Ranges::iterator it);
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private:
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Ranges::iterator mergeRangesForward(Ranges::iterator it);
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|
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Ranges::iterator mergeRangesBackward(Ranges::iterator it);
|
||||
};
|
||||
|
||||
struct StartPointComp {
|
||||
@ -85,6 +87,7 @@ namespace llvm {
|
||||
};
|
||||
|
||||
typedef std::list<Interval> Intervals;
|
||||
typedef std::map<unsigned, unsigned> Reg2RegMap;
|
||||
typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
|
||||
|
||||
private:
|
||||
@ -104,11 +107,15 @@ namespace llvm {
|
||||
typedef std::map<unsigned, Intervals::iterator> Reg2IntervalMap;
|
||||
Reg2IntervalMap r2iMap_;
|
||||
|
||||
Reg2RegMap r2rMap_;
|
||||
|
||||
Intervals intervals_;
|
||||
|
||||
public:
|
||||
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
|
||||
|
||||
Intervals& getIntervals() { return intervals_; }
|
||||
|
||||
MachineBasicBlockPtrs getOrderedMachineBasicBlockPtrs() const {
|
||||
MachineBasicBlockPtrs result;
|
||||
for (MbbIndex2MbbMap::const_iterator
|
||||
@ -119,6 +126,13 @@ namespace llvm {
|
||||
return result;
|
||||
}
|
||||
|
||||
const Reg2RegMap& getJoinedRegMap() const {
|
||||
return r2rMap_;
|
||||
}
|
||||
|
||||
/// rep - returns the representative of this register
|
||||
unsigned rep(unsigned reg);
|
||||
|
||||
private:
|
||||
/// runOnMachineFunction - pass entry point
|
||||
bool runOnMachineFunction(MachineFunction&);
|
||||
@ -126,6 +140,8 @@ namespace llvm {
|
||||
/// computeIntervals - compute live intervals
|
||||
void computeIntervals();
|
||||
|
||||
/// joinIntervals - join compatible live intervals
|
||||
void joinIntervals();
|
||||
|
||||
/// handleRegisterDef - update intervals for a register def
|
||||
/// (calls handlePhysicalRegisterDef and
|
||||
|
@ -32,12 +32,15 @@ using namespace llvm;
|
||||
namespace {
|
||||
Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
|
||||
Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
|
||||
Statistic<> numPeep ("ra-linearscan",
|
||||
"Number of identity moves eliminated");
|
||||
|
||||
class RA : public MachineFunctionPass {
|
||||
private:
|
||||
MachineFunction* mf_;
|
||||
const TargetMachine* tm_;
|
||||
const MRegisterInfo* mri_;
|
||||
LiveIntervals* li_;
|
||||
MachineFunction::iterator currentMbb_;
|
||||
MachineBasicBlock::iterator currentInstr_;
|
||||
typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
|
||||
@ -203,8 +206,8 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
|
||||
mf_ = &fn;
|
||||
tm_ = &fn.getTarget();
|
||||
mri_ = tm_->getRegisterInfo();
|
||||
|
||||
initIntervalSets(getAnalysis<LiveIntervals>().getIntervals());
|
||||
li_ = &getAnalysis<LiveIntervals>();
|
||||
initIntervalSets(li_->getIntervals());
|
||||
|
||||
v2pMap_.clear();
|
||||
v2ssMap_.clear();
|
||||
@ -231,6 +234,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
|
||||
reserved_[29] = true; /* FP6 */
|
||||
|
||||
// linear scan algorithm
|
||||
DEBUG(std::cerr << "Machine Function\n");
|
||||
|
||||
DEBUG(printIntervals("\tunhandled", unhandled_.begin(), unhandled_.end()));
|
||||
DEBUG(printIntervals("\tfixed", fixed_.begin(), fixed_.end()));
|
||||
@ -324,15 +328,54 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
|
||||
active_.clear();
|
||||
inactive_.clear();
|
||||
|
||||
DEBUG(std::cerr << "finished register allocation\n");
|
||||
typedef LiveIntervals::Reg2RegMap Reg2RegMap;
|
||||
const Reg2RegMap& r2rMap = li_->getJoinedRegMap();
|
||||
|
||||
DEBUG(printVirtRegAssignment());
|
||||
DEBUG(std::cerr << "Performing coalescing on joined intervals\n");
|
||||
// perform coalescing if we were passed joined intervals
|
||||
for(Reg2RegMap::const_iterator i = r2rMap.begin(), e = r2rMap.end();
|
||||
i != e; ++i) {
|
||||
unsigned reg = i->first;
|
||||
unsigned rep = li_->rep(reg);
|
||||
|
||||
assert((rep < MRegisterInfo::FirstVirtualRegister ||
|
||||
v2pMap_.find(rep) != v2pMap_.end() ||
|
||||
v2ssMap_.find(rep) != v2ssMap_.end()) &&
|
||||
"representative register is not allocated!");
|
||||
|
||||
assert(reg >= MRegisterInfo::FirstVirtualRegister &&
|
||||
v2pMap_.find(reg) == v2pMap_.end() &&
|
||||
v2ssMap_.find(reg) == v2ssMap_.end() &&
|
||||
"coalesced register is already allocated!");
|
||||
|
||||
if (rep < MRegisterInfo::FirstVirtualRegister) {
|
||||
v2pMap_.insert(std::make_pair(reg, rep));
|
||||
}
|
||||
else {
|
||||
Virt2PhysMap::const_iterator pr = v2pMap_.find(rep);
|
||||
if (pr != v2pMap_.end()) {
|
||||
v2pMap_.insert(std::make_pair(reg, pr->second));
|
||||
}
|
||||
else {
|
||||
Virt2StackSlotMap::const_iterator ss = v2ssMap_.find(rep);
|
||||
assert(ss != v2ssMap_.end());
|
||||
v2ssMap_.insert(std::make_pair(reg, ss->second));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
DEBUG(printVirtRegAssignment());
|
||||
DEBUG(std::cerr << "finished register allocation\n");
|
||||
|
||||
const TargetInstrInfo& tii = tm_->getInstrInfo();
|
||||
|
||||
DEBUG(std::cerr << "Rewrite machine code:\n");
|
||||
for (currentMbb_ = mf_->begin(); currentMbb_ != mf_->end(); ++currentMbb_) {
|
||||
instrAdded_ = 0;
|
||||
|
||||
for (currentInstr_ = currentMbb_->begin();
|
||||
currentInstr_ != currentMbb_->end(); ++currentInstr_) {
|
||||
currentInstr_ != currentMbb_->end(); ) {
|
||||
|
||||
DEBUG(std::cerr << "\tinstruction: ";
|
||||
(*currentInstr_)->print(std::cerr, *tm_););
|
||||
@ -355,6 +398,21 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
|
||||
}
|
||||
}
|
||||
|
||||
unsigned srcReg, dstReg;
|
||||
if (tii.isMoveInstr(**currentInstr_, srcReg, dstReg) &&
|
||||
((srcReg < MRegisterInfo::FirstVirtualRegister &&
|
||||
dstReg < MRegisterInfo::FirstVirtualRegister &&
|
||||
srcReg == dstReg) ||
|
||||
(srcReg >= MRegisterInfo::FirstVirtualRegister &&
|
||||
dstReg >= MRegisterInfo::FirstVirtualRegister &&
|
||||
v2ssMap_[srcReg] == v2ssMap_[dstReg]))) {
|
||||
delete *currentInstr_;
|
||||
currentInstr_ = currentMbb_->erase(currentInstr_);
|
||||
++numPeep;
|
||||
DEBUG(std::cerr << "\t\tdeleting instruction\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
DEBUG(std::cerr << "\t\tloading temporarily used operands to "
|
||||
"registers:\n");
|
||||
for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
|
||||
@ -416,6 +474,7 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
|
||||
}
|
||||
--currentInstr_; // restore currentInstr_ iterator
|
||||
tempDefOperands_.clear();
|
||||
++currentInstr_;
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user