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Fix an obvious oversight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119792 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1171,7 +1171,7 @@ def t2SUBrSPs : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$imm),
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def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi,
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"sdiv", "\t$Rd, $Rn, $Rm",
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[(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>,
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Requires<[HasDivide]> {
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Requires<[HasDivide, IsThumb2]> {
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let Inst{31-27} = 0b11111;
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let Inst{26-21} = 0b011100;
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let Inst{20} = 0b1;
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@ -1182,7 +1182,7 @@ def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi,
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def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi,
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"udiv", "\t$Rd, $Rn, $Rm",
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[(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>,
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Requires<[HasDivide]> {
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Requires<[HasDivide, IsThumb2]> {
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let Inst{31-27} = 0b11111;
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let Inst{26-21} = 0b011101;
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let Inst{20} = 0b1;
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