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It turns out that the testcase in question uncovered subreg-handling bug.
Add assert in asmprinter to catch such cases and xfail the tests. PR is to be filled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -347,9 +347,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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&ARM::DPR_VFP2RegClass);
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&ARM::DPR_VFP2RegClass);
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O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
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O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
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} else {
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} else {
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if (unsigned SubReg = MO.getSubReg())
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assert(!MO.getSubReg() && "Subregs should be eliminated!");
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Reg = TRI->getSubReg(Reg, SubReg);
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O << getRegisterName(Reg);
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O << getRegisterName(Reg);
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}
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}
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break;
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break;
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@ -137,6 +137,7 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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case MachineOperand::MO_Register:
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case MachineOperand::MO_Register:
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// Ignore all implicit register operands.
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// Ignore all implicit register operands.
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if (MO.isImplicit()) continue;
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if (MO.isImplicit()) continue;
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assert(!MO.getSubReg() && "Subregs should be eliminated!");
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MCOp = MCOperand::CreateReg(MO.getReg());
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MCOp = MCOperand::CreateReg(MO.getReg());
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break;
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break;
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case MachineOperand::MO_Immediate:
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case MachineOperand::MO_Immediate:
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@ -1,4 +1,5 @@
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; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
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; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
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; XFAIL: *
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "armv7-eabi"
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target triple = "armv7-eabi"
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