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Use BitVector instead of int in R600 SIISelLowering.

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int may not have enough bits in it, which was detected by UBSan
bootstrap (it reported left shift by a too large constant).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216579 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov 2014-08-27 19:36:53 +00:00
parent 34806d20dd
commit e909464366
1 changed files with 4 additions and 3 deletions
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7
lib/Target/R600/SIISelLowering.cpp
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@ -25,6 +25,7 @@
#include "SIInstrInfo.h"
#include "SIMachineFunctionInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@ -411,7 +412,7 @@ SDValue SITargetLowering::LowerFormalArguments(
assert(CallConv == CallingConv::C);
SmallVector<ISD::InputArg, 16> Splits;
uint32_t Skipped = 0;
BitVector Skipped(Ins.size());
for (unsigned i = 0, e = Ins.size(), PSInputNum = 0; i != e; ++i) {
const ISD::InputArg &Arg = Ins[i];
@ -424,7 +425,7 @@ SDValue SITargetLowering::LowerFormalArguments(
if (!Arg.Used) {
// We can savely skip PS inputs
Skipped |= 1 << i;
Skipped.set(i);
++PSInputNum;
continue;
}
@ -488,7 +489,7 @@ SDValue SITargetLowering::LowerFormalArguments(
for (unsigned i = 0, e = Ins.size(), ArgIdx = 0; i != e; ++i) {
const ISD::InputArg &Arg = Ins[i];
if (Skipped & (1 << i)) {
if (Skipped[i]) {
InVals.push_back(DAG.getUNDEF(Arg.VT));
continue;
}