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visitSetCondInst() takes a parameter of type `SetCondInst'

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
2004-06-30 21:47:40 +00:00
parent 65acb30178
commit ea09126414
4 changed files with 8 additions and 8 deletions
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4
lib/Target/Sparc/InstSelectSimple.cpp
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@@ -75,7 +75,7 @@ namespace {
void visitBinaryOperator(Instruction &I); void visitBinaryOperator(Instruction &I);
void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); } void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); }
void visitSetCondInst(Instruction &I); void visitSetCondInst(SetCondInst &I);
void visitCallInst(CallInst &I); void visitCallInst(CallInst &I);
void visitReturnInst(ReturnInst &I); void visitReturnInst(ReturnInst &I);
void visitBranchInst(BranchInst &I); void visitBranchInst(BranchInst &I);
@@ -924,7 +924,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) {
} }
} }
void V8ISel::visitSetCondInst(Instruction &I) { void V8ISel::visitSetCondInst(SetCondInst &I) {
unsigned Op0Reg = getReg (I.getOperand (0)); unsigned Op0Reg = getReg (I.getOperand (0));
unsigned Op1Reg = getReg (I.getOperand (1)); unsigned Op1Reg = getReg (I.getOperand (1));
unsigned DestReg = getReg (I); unsigned DestReg = getReg (I);

4
lib/Target/Sparc/SparcV8ISelSimple.cpp
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@@ -75,7 +75,7 @@ namespace {
void visitBinaryOperator(Instruction &I); void visitBinaryOperator(Instruction &I);
void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); } void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); }
void visitSetCondInst(Instruction &I); void visitSetCondInst(SetCondInst &I);
void visitCallInst(CallInst &I); void visitCallInst(CallInst &I);
void visitReturnInst(ReturnInst &I); void visitReturnInst(ReturnInst &I);
void visitBranchInst(BranchInst &I); void visitBranchInst(BranchInst &I);
@@ -924,7 +924,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) {
} }
} }
void V8ISel::visitSetCondInst(Instruction &I) { void V8ISel::visitSetCondInst(SetCondInst &I) {
unsigned Op0Reg = getReg (I.getOperand (0)); unsigned Op0Reg = getReg (I.getOperand (0));
unsigned Op1Reg = getReg (I.getOperand (1)); unsigned Op1Reg = getReg (I.getOperand (1));
unsigned DestReg = getReg (I); unsigned DestReg = getReg (I);

4
lib/Target/SparcV8/InstSelectSimple.cpp
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@@ -75,7 +75,7 @@ namespace {
void visitBinaryOperator(Instruction &I); void visitBinaryOperator(Instruction &I);
void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); } void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); }
void visitSetCondInst(Instruction &I); void visitSetCondInst(SetCondInst &I);
void visitCallInst(CallInst &I); void visitCallInst(CallInst &I);
void visitReturnInst(ReturnInst &I); void visitReturnInst(ReturnInst &I);
void visitBranchInst(BranchInst &I); void visitBranchInst(BranchInst &I);
@@ -924,7 +924,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) {
} }
} }
void V8ISel::visitSetCondInst(Instruction &I) { void V8ISel::visitSetCondInst(SetCondInst &I) {
unsigned Op0Reg = getReg (I.getOperand (0)); unsigned Op0Reg = getReg (I.getOperand (0));
unsigned Op1Reg = getReg (I.getOperand (1)); unsigned Op1Reg = getReg (I.getOperand (1));
unsigned DestReg = getReg (I); unsigned DestReg = getReg (I);

4
lib/Target/SparcV8/SparcV8ISelSimple.cpp
View File

@@ -75,7 +75,7 @@ namespace {
void visitBinaryOperator(Instruction &I); void visitBinaryOperator(Instruction &I);
void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); } void visitShiftInst (ShiftInst &SI) { visitBinaryOperator (SI); }
void visitSetCondInst(Instruction &I); void visitSetCondInst(SetCondInst &I);
void visitCallInst(CallInst &I); void visitCallInst(CallInst &I);
void visitReturnInst(ReturnInst &I); void visitReturnInst(ReturnInst &I);
void visitBranchInst(BranchInst &I); void visitBranchInst(BranchInst &I);
@@ -924,7 +924,7 @@ void V8ISel::visitBinaryOperator (Instruction &I) {
} }
} }
void V8ISel::visitSetCondInst(Instruction &I) { void V8ISel::visitSetCondInst(SetCondInst &I) {
unsigned Op0Reg = getReg (I.getOperand (0)); unsigned Op0Reg = getReg (I.getOperand (0));
unsigned Op1Reg = getReg (I.getOperand (1)); unsigned Op1Reg = getReg (I.getOperand (1));
unsigned DestReg = getReg (I); unsigned DestReg = getReg (I);