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[mips] Move all ByVal handling into CCState and tablegen-erated code. NFC.
Summary: CCState already contains a byval implementation that is very similar to the Mips custom code. This patch merges the custom code into the existing common code and tablegen-erated code. Reviewers: vmedic Reviewed By: vmedic Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D5977 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221059 91177308-0d34-0410-b5e6-96231b3b80d8
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29
lib/Target/Mips/MipsABIInfo.cpp
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29
lib/Target/Mips/MipsABIInfo.cpp
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//===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsABIInfo.h"
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#include "MipsRegisterInfo.h"
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using namespace llvm;
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namespace {
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static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
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static const MCPhysReg Mips64IntRegs[8] = {
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Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
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Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
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}
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const ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
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if (IsO32())
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return makeArrayRef(O32IntRegs);
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if (IsN32() || IsN64())
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return makeArrayRef(Mips64IntRegs);
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llvm_unreachable("Unhandled ABI");
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}
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