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Fix signed overflow in when computing encodings for ADR instructions

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188268 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Mihai Popa 2013-08-13 14:02:13 +00:00
parent 4d36bd80e6
commit ea8ddd86b1
2 changed files with 3 additions and 2 deletions
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2
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -671,7 +671,7 @@ getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
if (MO.isExpr()) if (MO.isExpr())
return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_adr_pcrel_12, return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_adr_pcrel_12,
Fixups); Fixups);
int32_t offset = MO.getImm(); int64_t offset = MO.getImm();
uint32_t Val = 0x2000; uint32_t Val = 0x2000;
int SoImmVal; int SoImmVal;

3
test/MC/ARM/basic-arm-instructions.s
View File

@ -153,7 +153,6 @@ Lforward:
@ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2] @ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2]
@ CHECK: adr r1, #-2147483647 @ encoding: [0x06,0x11,0x8f,0xe2] @ CHECK: adr r1, #-2147483647 @ encoding: [0x06,0x11,0x8f,0xe2]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ ADD @ ADD
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ -187,6 +186,7 @@ Lforward:
add r0, #-4 add r0, #-4
add r4, r5, #-21 add r4, r5, #-21
add r0, pc, #0xc0000000
@ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2] @ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2]
@ CHECK: add r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe0] @ CHECK: add r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe0]
@ -217,6 +217,7 @@ Lforward:
@ CHECK: sub r0, r0, #4 @ encoding: [0x04,0x00,0x40,0xe2] @ CHECK: sub r0, r0, #4 @ encoding: [0x04,0x00,0x40,0xe2]
@ CHECK: sub r4, r5, #21 @ encoding: [0x15,0x40,0x45,0xe2] @ CHECK: sub r4, r5, #21 @ encoding: [0x15,0x40,0x45,0xe2]
@ CHECK: adr r0, #-1073741824 @ encoding: [0x03,0x01,0x8f,0xe2]
@ Test right shift by 32, which is encoded as 0 @ Test right shift by 32, which is encoded as 0
add r3, r1, r2, lsr #32 add r3, r1, r2, lsr #32