Change errs() to dbgs().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92565 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Greene
2010-01-05 01:24:21 +00:00
parent eeb3a00b84
commit eb00b18338

View File

@ -573,15 +573,15 @@ TwoAddressInstructionPass::CommuteInstruction(MachineBasicBlock::iterator &mi,
MachineFunction::iterator &mbbi, MachineFunction::iterator &mbbi,
unsigned RegB, unsigned RegC, unsigned Dist) { unsigned RegB, unsigned RegC, unsigned Dist) {
MachineInstr *MI = mi; MachineInstr *MI = mi;
DEBUG(errs() << "2addr: COMMUTING : " << *MI); DEBUG(dbgs() << "2addr: COMMUTING : " << *MI);
MachineInstr *NewMI = TII->commuteInstruction(MI); MachineInstr *NewMI = TII->commuteInstruction(MI);
if (NewMI == 0) { if (NewMI == 0) {
DEBUG(errs() << "2addr: COMMUTING FAILED!\n"); DEBUG(dbgs() << "2addr: COMMUTING FAILED!\n");
return false; return false;
} }
DEBUG(errs() << "2addr: COMMUTED TO: " << *NewMI); DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI);
// If the instruction changed to commute it, update livevar. // If the instruction changed to commute it, update livevar.
if (NewMI != MI) { if (NewMI != MI) {
if (LV) if (LV)
@ -628,8 +628,8 @@ TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi,
unsigned RegB, unsigned Dist) { unsigned RegB, unsigned Dist) {
MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
if (NewMI) { if (NewMI) {
DEBUG(errs() << "2addr: CONVERTING 2-ADDR: " << *mi); DEBUG(dbgs() << "2addr: CONVERTING 2-ADDR: " << *mi);
DEBUG(errs() << "2addr: TO 3-ADDR: " << *NewMI); DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
bool Sunk = false; bool Sunk = false;
if (NewMI->findRegisterUseOperand(RegB, false, TRI)) if (NewMI->findRegisterUseOperand(RegB, false, TRI))
@ -891,7 +891,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
/// runOnMachineFunction - Reduce two-address instructions to two operands. /// runOnMachineFunction - Reduce two-address instructions to two operands.
/// ///
bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DEBUG(errs() << "Machine Function\n"); DEBUG(dbgs() << "Machine Function\n");
const TargetMachine &TM = MF.getTarget(); const TargetMachine &TM = MF.getTarget();
MRI = &MF.getRegInfo(); MRI = &MF.getRegInfo();
TII = TM.getInstrInfo(); TII = TM.getInstrInfo();
@ -901,8 +901,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
bool MadeChange = false; bool MadeChange = false;
DEBUG(errs() << "********** REWRITING TWO-ADDR INSTRS **********\n"); DEBUG(dbgs() << "********** REWRITING TWO-ADDR INSTRS **********\n");
DEBUG(errs() << "********** Function: " DEBUG(dbgs() << "********** Function: "
<< MF.getFunction()->getName() << '\n'); << MF.getFunction()->getName() << '\n');
// ReMatRegs - Keep track of the registers whose def's are remat'ed. // ReMatRegs - Keep track of the registers whose def's are remat'ed.
@ -943,7 +943,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
if (FirstTied) { if (FirstTied) {
FirstTied = false; FirstTied = false;
++NumTwoAddressInstrs; ++NumTwoAddressInstrs;
DEBUG(errs() << '\t' << *mi); DEBUG(dbgs() << '\t' << *mi);
} }
assert(mi->getOperand(SrcIdx).isReg() && assert(mi->getOperand(SrcIdx).isReg() &&
@ -1024,7 +1024,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DefMI->getDesc().isAsCheapAsAMove() && DefMI->getDesc().isAsCheapAsAMove() &&
DefMI->isSafeToReMat(TII, regB, AA) && DefMI->isSafeToReMat(TII, regB, AA) &&
isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist)){ isProfitableToReMat(regB, rc, mi, DefMI, mbbi, Dist)){
DEBUG(errs() << "2addr: REMATTING : " << *DefMI << "\n"); DEBUG(dbgs() << "2addr: REMATTING : " << *DefMI << "\n");
unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg(); unsigned regASubIdx = mi->getOperand(DstIdx).getSubReg();
TII->reMaterialize(*mbbi, mi, regA, regASubIdx, DefMI, TRI); TII->reMaterialize(*mbbi, mi, regA, regASubIdx, DefMI, TRI);
ReMatRegs.set(regB); ReMatRegs.set(regB);
@ -1040,7 +1040,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DistanceMap.insert(std::make_pair(prevMI, Dist)); DistanceMap.insert(std::make_pair(prevMI, Dist));
DistanceMap[mi] = ++Dist; DistanceMap[mi] = ++Dist;
DEBUG(errs() << "\t\tprepend:\t" << *prevMI); DEBUG(dbgs() << "\t\tprepend:\t" << *prevMI);
MachineOperand &MO = mi->getOperand(SrcIdx); MachineOperand &MO = mi->getOperand(SrcIdx);
assert(MO.isReg() && MO.getReg() == regB && MO.isUse() && assert(MO.isReg() && MO.getReg() == regB && MO.isUse() &&
@ -1085,7 +1085,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MadeChange = true; MadeChange = true;
DEBUG(errs() << "\t\trewrite to:\t" << *mi); DEBUG(dbgs() << "\t\trewrite to:\t" << *mi);
} }
// Clear TiedOperands here instead of at the top of the loop // Clear TiedOperands here instead of at the top of the loop