From eb582d7ba202e06ea339def0b610bc31565250da Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 11 Mar 2011 18:00:42 +0000 Subject: [PATCH] Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127469 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index df270ad0c44..b6c447bb5c1 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -3178,9 +3178,9 @@ def MOVCCi : ARMPseudoInst<(outs GPR:$Rd), // Two instruction predicate mov immediate. let isMoveImm = 1 in -def MOVCCi32imm : PseudoInst<(outs GPR:$Rd), - (ins GPR:$false, i32imm:$src, pred:$p), - IIC_iCMOVix2, []>, RegConstraint<"$false = $Rd">; +def MOVCCi32imm : ARMPseudoInst<(outs GPR:$Rd), + (ins GPR:$false, i32imm:$src, pred:$p), + Size8Bytes, IIC_iCMOVix2, []>, RegConstraint<"$false = $Rd">; let isMoveImm = 1 in def MVNCCi : AI1<0b1111, (outs GPR:$Rd),