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R600: Improve support for < 32-bit loads

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Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2013-07-23 01:48:35 +00:00
parent 20027547b9
commit eb643b9b37
6 changed files with 106 additions and 25 deletions
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4
lib/Target/R600/SIISelLowering.cpp
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@@ -116,9 +116,9 @@ SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT,
MRI.getLiveInVirtReg(AMDGPU::SGPR0_SGPR1), MVT::i64);
SDValue Ptr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr,
DAG.getConstant(Offset, MVT::i64));
return DAG.getExtLoad(ISD::ZEXTLOAD, DL, VT, Chain, Ptr,
return DAG.getLoad(VT, DL, Chain, Ptr,
MachinePointerInfo(UndefValue::get(PtrTy)),
VT, false, false, ArgVT.getSizeInBits() >> 3);
false, false, false, ArgVT.getSizeInBits() >> 3);
}