From ebf01d63b0ae24b29aa3e917d51458231c203b6f Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 16 Nov 2006 23:33:25 +0000 Subject: [PATCH] Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrSSE.td | 11 ++++++----- lib/Target/X86/X86InstrX86-64.td | 26 ++++++++++++++++++++++++++ lib/Target/X86/X86RegisterInfo.cpp | 3 ++- 3 files changed, 34 insertions(+), 6 deletions(-) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index bbea10737a1..2de8081ea7c 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1682,17 +1682,18 @@ def MOVDI2PDIrm : PDI<0x6E, MRMSrcMem, (ops VR128:$dst, i32mem:$src), "movd {$src, $dst|$dst, $src}", [(set VR128:$dst, (v4i32 (scalar_to_vector (loadi32 addr:$src))))]>; + // SSE2 instructions with XS prefix -def MOVQI2PQIrr : I<0x7E, MRMSrcReg, (ops VR128:$dst, VR64:$src), - "movq {$src, $dst|$dst, $src}", - [(set VR128:$dst, - (v2i64 (scalar_to_vector VR64:$src)))]>, XS, - Requires<[HasSSE2]>; def MOVQI2PQIrm : I<0x7E, MRMSrcMem, (ops VR128:$dst, i64mem:$src), "movq {$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>, XS, Requires<[HasSSE2]>; +def MOVPQI2QImr : PDI<0xD6, MRMDestMem, (ops i64mem:$dst, VR128:$src), + "movq {$src, $dst|$dst, $src}", + [(store (i64 (vector_extract (v2i64 VR128:$src), + (iPTR 0))), addr:$dst)]>; + // FIXME: may not be able to eliminate this movss with coalescing the src and // dest register classes are different. We really want to write this pattern // like this: diff --git a/lib/Target/X86/X86InstrX86-64.td b/lib/Target/X86/X86InstrX86-64.td index b4dd1dbe6c9..3042802b778 100644 --- a/lib/Target/X86/X86InstrX86-64.td +++ b/lib/Target/X86/X86InstrX86-64.td @@ -59,6 +59,8 @@ class RSSI o, Format F, dag ops, string asm, list pattern> : SSI, REX_W; class RSDI o, Format F, dag ops, string asm, list pattern> : SDI, REX_W; +class RPDI o, Format F, dag ops, string asm, list pattern> + : PDI, REX_W; //===----------------------------------------------------------------------===// // Pattern fragments... @@ -1076,3 +1078,27 @@ def : Pat<(or (shl GR64:$src1, CL:$amt), def : Pat<(store (or (shl (loadi64 addr:$dst), CL:$amt), (srl GR64:$src2, (sub 64, CL:$amt))), addr:$dst), (SHLD64mrCL addr:$dst, GR64:$src2)>; + +//===----------------------------------------------------------------------===// +// X86-64 SSE Instructions +//===----------------------------------------------------------------------===// + +// Move instructions... + +def MOV64toPQIrr : RPDI<0x6E, MRMSrcReg, (ops VR128:$dst, GR64:$src), + "movq {$src, $dst|$dst, $src}", + [(set VR128:$dst, + (v2i64 (scalar_to_vector GR64:$src)))]>; +def MOV64toPQIrm : RPDI<0x6E, MRMSrcMem, (ops VR128:$dst, i64mem:$src), + "movq {$src, $dst|$dst, $src}", + [(set VR128:$dst, + (v2i64 (scalar_to_vector (loadi64 addr:$src))))]>; + +def MOVPQIto64rr : RPDI<0x7E, MRMDestReg, (ops GR64:$dst, VR128:$src), + "movd {$src, $dst|$dst, $src}", + [(set GR64:$dst, (vector_extract (v2i64 VR128:$src), + (iPTR 0)))]>; +def MOVPQIto64mr : RPDI<0x7E, MRMDestMem, (ops i64mem:$dst, VR128:$src), + "movd {$src, $dst|$dst, $src}", + [(store (i64 (vector_extract (v2i64 VR128:$src), + (iPTR 0))), addr:$dst)]>; diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 353a159d181..f061aeed7ee 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -509,6 +509,7 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, { X86::MOVAPDrr, X86::MOVAPDmr }, { X86::MOVAPSrr, X86::MOVAPSmr }, { X86::MOVPDI2DIrr, X86::MOVPDI2DImr }, + { X86::MOVPQIto64rr,X86::MOVPQIto64mr }, { X86::MOVPS2SSrr, X86::MOVPS2SSmr }, { X86::MOVSDrr, X86::MOVSDmr }, { X86::MOVSSrr, X86::MOVSSmr }, @@ -606,12 +607,12 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, { X86::MOV16rr, X86::MOV16rm }, { X86::MOV32rr, X86::MOV32rm }, { X86::MOV64rr, X86::MOV64rm }, + { X86::MOV64toPQIrr, X86::MOV64toPQIrm }, { X86::MOV8rr, X86::MOV8rm }, { X86::MOVAPDrr, X86::MOVAPDrm }, { X86::MOVAPSrr, X86::MOVAPSrm }, { X86::MOVDDUPrr, X86::MOVDDUPrm }, { X86::MOVDI2PDIrr, X86::MOVDI2PDIrm }, - { X86::MOVQI2PQIrr, X86::MOVQI2PQIrm }, { X86::MOVSD2PDrr, X86::MOVSD2PDrm }, { X86::MOVSDrr, X86::MOVSDrm }, { X86::MOVSHDUPrr, X86::MOVSHDUPrm },