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Clean up a bunch of whitespace issues and fix a comment typo.

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No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68808 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2009-04-10 18:48:47 +00:00
parent 6818985032
commit ec15bbfd2f
1 changed files with 74 additions and 72 deletions
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42
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@@ -3147,9 +3147,10 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
TmpEltVT, Tmp2,
DAG.getIntPtrConstant(i)),
CC);
Ops[i] = DAG.getNode(ISD::SELECT, dl, EltVT, Ops[i], DAG.getConstant(
APInt::getAllOnesValue(EltVT.getSizeInBits()),
EltVT), DAG.getConstant(0, EltVT));
Ops[i] = DAG.getNode(ISD::SELECT, dl, EltVT, Ops[i],
DAG.getConstant(APInt::getAllOnesValue
(EltVT.getSizeInBits()), EltVT),
DAG.getConstant(0, EltVT));
}
Result = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElems);
break;
@@ -5418,8 +5419,9 @@ SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp,
MVT DestVT,
DebugLoc dl) {
// Create the stack frame object.
unsigned SrcAlign = TLI.getTargetData()->getPrefTypeAlignment(
SrcOp.getValueType().getTypeForMVT());
unsigned SrcAlign =
TLI.getTargetData()->getPrefTypeAlignment(SrcOp.getValueType().
getTypeForMVT());
SDValue FIPtr = DAG.CreateStackTemporary(SlotVT, SrcAlign);
FrameIndexSDNode *StackPtrFI = cast<FrameIndexSDNode>(FIPtr);
@@ -5429,8 +5431,8 @@ SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp,
unsigned SrcSize = SrcOp.getValueType().getSizeInBits();
unsigned SlotSize = SlotVT.getSizeInBits();
unsigned DestSize = DestVT.getSizeInBits();
unsigned DestAlign = TLI.getTargetData()->getPrefTypeAlignment(
DestVT.getTypeForMVT());
unsigned DestAlign =
TLI.getTargetData()->getPrefTypeAlignment(DestVT.getTypeForMVT());
// Emit a store to the stack slot. Use a truncstore if the input value is
// later than DestVT.
@@ -5576,7 +5578,7 @@ SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
else
Val2 = (++MI)->first;
// If Val1 is an undef, make sure end ends up as Val2, to ensure that our
// If Val1 is an undef, make sure it ends up as Val2, to ensure that our
// vector shuffle has the undef vector on the RHS.
if (Val1.getOpcode() == ISD::UNDEF)
std::swap(Val1, Val2);
@@ -5916,8 +5918,7 @@ LegalizeINT_TO_FP(SDValue Result, bool isSigned, MVT DestTy, SDValue Op,
Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Tmp1.getValueType(),
Tmp1, DAG.getValueType(Op.getValueType()));
} else {
Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl,
Op.getValueType());
Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl, Op.getValueType());
}
if (Result.getNode())
Result = DAG.UpdateNodeOperands(Result, Tmp1);
@@ -6117,8 +6118,8 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned,
SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, NULL, 0);
// FP constant to bias correct the final result
SDValue Bias = DAG.getConstantFP(isSigned ?
BitsToDouble(0x4330000080000000ULL)
: BitsToDouble(0x4330000000000000ULL),
BitsToDouble(0x4330000080000000ULL) :
BitsToDouble(0x4330000000000000ULL),
MVT::f64);
// subtract the bias
SDValue Sub = DAG.getNode(ISD::FSUB, dl, MVT::f64, Load, Bias);
@@ -6454,8 +6455,9 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){
SDValue SrcLo, SrcHi, Src;
ExpandOp(Op.getOperand(0), SrcLo, SrcHi);
Src = DAG.getNode(ISD::BUILD_PAIR, dl, VT, SrcLo, SrcHi);
SDValue Result = TLI.LowerOperation(
DAG.getNode(ISD::FP_ROUND_INREG, dl, VT, Src, Op.getOperand(1)), DAG);
SDValue Result =
TLI.LowerOperation(DAG.getNode(ISD::FP_ROUND_INREG, dl, VT, Src,
Op.getOperand(1)), DAG);
assert(Result.getNode()->getOpcode() == ISD::BUILD_PAIR);
Lo = Result.getNode()->getOperand(0);
Hi = Result.getNode()->getOperand(1);
@@ -7423,8 +7425,8 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){
MVT::ppcf128, Node->getOperand(0),
DAG.getConstant(0, MVT::i32),
DAG.getNode(ISD::FADD, dl, MVT::ppcf128, Hi,
DAG.getConstantFP(
APFloat(APInt(128, 2, TwoE32)),
DAG.getConstantFP
(APFloat(APInt(128, 2, TwoE32)),
MVT::ppcf128)),
Hi,
DAG.getCondCode(ISD::SETLT)),
@@ -7443,8 +7445,8 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){
Node->getOperand(0),
DAG.getConstant(0, MVT::i64),
DAG.getNode(ISD::FADD, dl, MVT::ppcf128, Hi,
DAG.getConstantFP(
APFloat(APInt(128, 2, TwoE64)),
DAG.getConstantFP
(APFloat(APInt(128, 2, TwoE64)),
MVT::ppcf128)),
Hi,
DAG.getCondCode(ISD::SETLT)),
@@ -7804,8 +7806,8 @@ void SelectionDAGLegalize::SplitVectorOp(SDValue Op, SDValue &Lo,
// The input is a scalar or single-element vector.
// Lower to a store/load so that it can be split.
// FIXME: this could be improved probably.
unsigned LdAlign = TLI.getTargetData()->getPrefTypeAlignment(
Op.getValueType().getTypeForMVT());
unsigned LdAlign = TLI.getTargetData()->
getPrefTypeAlignment(Op.getValueType().getTypeForMVT());
SDValue Ptr = DAG.CreateStackTemporary(InOp.getValueType(), LdAlign);
int FI = cast<FrameIndexSDNode>(Ptr.getNode())->getIndex();