6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-18 11:24:01 +00:00
Code Issues Projects Releases Wiki Activity

a bunch of random cleanup, move a helper to CGT where it belongs.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118031 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-11-02 18:10:06 +00:00
parent 1aabe1b493
commit ec6f096c36
3 changed files with 52 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
utils/TableGen/CodeGenTarget.cpp
View File

@ -190,6 +190,19 @@ void CodeGenTarget::ReadRegisterClasses() const {
RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
}
/// getRegisterByName - If there is a register with the specific AsmName,
/// return it.
const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
const std::vector<CodeGenRegister> &Regs = getRegisters();
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
const CodeGenRegister &Reg = Regs[i];
if (Reg.TheDef->getValueAsString("AsmName") == Name)
return &Reg;
}
return 0;
}
std::vector<MVT::SimpleValueType> CodeGenTarget::
getRegisterVTs(Record *R) const {
std::vector<MVT::SimpleValueType> Result;