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[RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213188 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -438,60 +438,3 @@ bool ARMSubtarget::useMovt(const MachineFunction &MF) const {
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!MF.getFunction()->getAttributes().hasAttribute(
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AttributeSet::FunctionIndex, Attribute::MinSize));
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}
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bool ARMSubtarget::shouldCoalesce(MachineInstr *MI,
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const TargetRegisterClass *SrcRC,
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unsigned SubReg,
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const TargetRegisterClass *DstRC,
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unsigned DstSubReg,
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const TargetRegisterClass *NewRC) const {
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auto MBB = MI->getParent();
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auto MF = MBB->getParent();
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const MachineRegisterInfo &MRI = MF->getRegInfo();
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// If not copying into a sub-register this should be ok because we shouldn't
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// need to split the reg.
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if (!DstSubReg)
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return true;
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// Small registers don't frequently cause a problem, so we can coalesce them.
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if (NewRC->getSize() < 32 && DstRC->getSize() < 32 && SrcRC->getSize() < 32)
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return true;
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auto NewRCWeight =
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MRI.getTargetRegisterInfo()->getRegClassWeight(NewRC);
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auto SrcRCWeight =
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MRI.getTargetRegisterInfo()->getRegClassWeight(SrcRC);
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auto DstRCWeight =
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MRI.getTargetRegisterInfo()->getRegClassWeight(DstRC);
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// If the source register class is more expensive than the destination, the
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// coalescing is probably profitable.
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if (SrcRCWeight.RegWeight > NewRCWeight.RegWeight)
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return true;
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if (DstRCWeight.RegWeight > NewRCWeight.RegWeight)
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return true;
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// If the register allocator isn't constrained, we can always allow coalescing
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// unfortunately we don't know yet if we will be constrained.
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// The goal of this heuristic is to restrict how many expensive registers
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// we allow to coalesce in a given basic block.
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auto AFI = MF->getInfo<ARMFunctionInfo>();
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auto It = AFI->getCoalescedWeight(MBB);
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DEBUG(dbgs() << "\tARM::shouldCoalesce - Coalesced Weight: "
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<< It->second << "\n");
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DEBUG(dbgs() << "\tARM::shouldCoalesce - Reg Weight: "
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<< NewRCWeight.RegWeight << "\n");
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// This number is the largest round number that which meets the criteria:
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// (1) addresses PR18825
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// (2) generates better code in some test cases (like vldm-shed-a9.ll)
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// (3) Doesn't regress any test cases (in-tree, test-suite, and SPEC)
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// In practice the SizeMultiplier will only factor in for straight line code
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// that uses a lot of NEON vectors, which isn't terribly common.
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unsigned SizeMultiplier = MBB->size()/100;
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SizeMultiplier = SizeMultiplier ? SizeMultiplier : 1;
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if (It->second < NewRCWeight.WeightLimit * SizeMultiplier) {
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It->second += NewRCWeight.RegWeight;
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return true;
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}
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return false;
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}
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