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https://github.com/c64scene-ar/llvm-6502.git
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This code implements most of mips16 hardfloat as it is done by gcc.
In this case, essentially it is soft float with different library routines. The next step will be to make this fully interoperational with mips32 floating point and that requires creating stubs for functions with signatures that contain floating point types. I have a more sophisticated design for mips16 hardfloat which I hope to implement at a later time that directly does floating point without the need for function calls. The mips16 encoding has no floating point instructions so one needs to switch to mips32 mode to execute floating point instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170259 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -50,6 +50,13 @@ static cl::opt<bool>
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LargeGOT("mxgot", cl::Hidden,
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cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false));
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static cl::opt<bool>
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Mips16HardFloat("mips16-hard-float", cl::NotHidden,
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cl::desc("MIPS: mips16 hard float enable."),
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cl::init(false));
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static const uint16_t O32IntRegs[4] = {
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Mips::A0, Mips::A1, Mips::A2, Mips::A3
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};
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@@ -198,6 +205,41 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
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}
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}
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void MipsTargetLowering::setMips16HardFloatLibCalls() {
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setLibcallName(RTLIB::ADD_F32, "__mips16_addsf3");
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setLibcallName(RTLIB::ADD_F64, "__mips16_adddf3");
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setLibcallName(RTLIB::SUB_F32, "__mips16_subsf3");
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setLibcallName(RTLIB::SUB_F64, "__mips16_subdf3");
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setLibcallName(RTLIB::MUL_F32, "__mips16_mulsf3");
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setLibcallName(RTLIB::MUL_F64, "__mips16_muldf3");
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setLibcallName(RTLIB::DIV_F32, "__mips16_divsf3");
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setLibcallName(RTLIB::DIV_F64, "__mips16_divdf3");
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setLibcallName(RTLIB::FPEXT_F32_F64, "__mips16_extendsfdf2");
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setLibcallName(RTLIB::FPROUND_F64_F32, "__mips16_truncdfsf2");
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setLibcallName(RTLIB::FPTOSINT_F32_I32, "__mips16_fix_truncsfsi");
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setLibcallName(RTLIB::FPTOSINT_F64_I32, "__mips16_fix_truncdfsi");
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setLibcallName(RTLIB::SINTTOFP_I32_F32, "__mips16_floatsisf");
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setLibcallName(RTLIB::SINTTOFP_I32_F64, "__mips16_floatsidf");
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setLibcallName(RTLIB::UINTTOFP_I32_F32, "__mips16_floatunsisf");
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setLibcallName(RTLIB::UINTTOFP_I32_F64, "__mips16_floatunsidf");
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setLibcallName(RTLIB::OEQ_F32, "__mips16_eqsf2");
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setLibcallName(RTLIB::OEQ_F64, "__mips16_eqdf2");
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setLibcallName(RTLIB::UNE_F32, "__mips16_nesf2");
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setLibcallName(RTLIB::UNE_F64, "__mips16_nedf2");
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setLibcallName(RTLIB::OGE_F32, "__mips16_gesf2");
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setLibcallName(RTLIB::OGE_F64, "__mips16_gedf2");
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setLibcallName(RTLIB::OLT_F32, "__mips16_ltsf2");
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setLibcallName(RTLIB::OLT_F64, "__mips16_ltdf2");
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setLibcallName(RTLIB::OLE_F32, "__mips16_lesf2");
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setLibcallName(RTLIB::OLE_F64, "__mips16_ledf2");
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setLibcallName(RTLIB::OGT_F32, "__mips16_gtsf2");
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setLibcallName(RTLIB::OGT_F64, "__mips16_gtdf2");
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setLibcallName(RTLIB::UO_F32, "__mips16_unordsf2");
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setLibcallName(RTLIB::UO_F64, "__mips16_unorddf2");
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setLibcallName(RTLIB::O_F32, "__mips16_unordsf2");
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setLibcallName(RTLIB::O_F64, "__mips16_unorddf2");
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}
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MipsTargetLowering::
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MipsTargetLowering(MipsTargetMachine &TM)
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: TargetLowering(TM, new MipsTargetObjectFile()),
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@@ -218,6 +260,8 @@ MipsTargetLowering(MipsTargetMachine &TM)
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if (Subtarget->inMips16Mode()) {
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addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
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if (Mips16HardFloat)
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setMips16HardFloatLibCalls();
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}
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if (Subtarget->hasDSP()) {
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