diff --git a/docs/CommandGuide/llc.html b/docs/CommandGuide/llc.html
index 26e680342cd..8788a7a608a 100644
--- a/docs/CommandGuide/llc.html
+++ b/docs/CommandGuide/llc.html
@@ -95,11 +95,6 @@ OPTIONS
Disable frame pointer elimination optimization.
-
-disable-local-ra
-
- Use Simple RA instead of Local RegAlloc.
-
-
-disable-pattern-isel
Use the 'simple' X86 instruction selector.
@@ -146,13 +141,11 @@ OPTIONS
architectures are:
- x86
- -
- IA-32 (Pentium and above)
-
+ x86
+ - IA-32 (Pentium and above)
- sparc
- - SPARC V9
+ sparc
+
- SPARC V9
@@ -166,6 +159,19 @@ OPTIONS
Print generated machine code.
+
-regalloc=<ra>
+
+ Specify the register allocator to use. The default is simple.
+ Valid register allocators are:
+
+ simple
+ - Very simple register allocator
+
+ local
+ - Local register allocator
+
+
+
-help
Print a summary of command line options.
diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
index 5f8a19df7fa..309bf66cf81 100644
--- a/include/llvm/CodeGen/Passes.h
+++ b/include/llvm/CodeGen/Passes.h
@@ -19,6 +19,8 @@ class TargetMachine;
//
extern const PassInfo *PHIEliminationID;
+enum RegAllocName { simple, local };
+
/// SimpleRegisterAllocation Pass - This pass converts the input machine code
/// from SSA form to use explicit registers by spilling every register. Wow,
/// great policy huh?
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 60f8bbca19b..8f6829f6de4 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -16,8 +16,15 @@
#include "Support/Statistic.h"
namespace {
- cl::opt NoLocalRA("disable-local-ra",
- cl::desc("Use Simple RA instead of Local RegAlloc"));
+ cl::opt
+ RegAlloc("regalloc",
+ cl::desc("Register allocator to use: (default = simple)"),
+ cl::Prefix,
+ cl::values(clEnumVal(simple, " simple register allocator"),
+ clEnumVal(local, " local register allocator"),
+ 0),
+ cl::init(local));
+
cl::opt PrintCode("print-machineinstrs",
cl::desc("Print generated machine code"));
cl::opt NoPatternISel("disable-pattern-isel", cl::init(true),
@@ -66,10 +73,16 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
PM.add(createMachineFunctionPrinterPass());
// Perform register allocation to convert to a concrete x86 representation
- if (NoLocalRA)
+ switch (RegAlloc) {
+ case simple:
PM.add(createSimpleRegisterAllocator());
- else
+ break;
+ case local:
PM.add(createLocalRegisterAllocator());
+ break;
+ default:
+ assert(0 && "no register allocator selected");
+ }
if (PrintCode)
PM.add(createMachineFunctionPrinterPass());
@@ -113,10 +126,16 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
PM.add(createMachineFunctionPrinterPass());
// Perform register allocation to convert to a concrete x86 representation
- if (NoLocalRA)
+ switch (RegAlloc) {
+ case simple:
PM.add(createSimpleRegisterAllocator());
- else
+ break;
+ case local:
PM.add(createLocalRegisterAllocator());
+ break;
+ default:
+ assert(0 && "no register allocator selected");
+ }
if (PrintCode)
PM.add(createMachineFunctionPrinterPass());
diff --git a/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx
index 05b760a5c5e..1511df34311 100644
--- a/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx
+++ b/test/CodeGen/X86/2002-12-23-LocalRAProblem.llx
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | lli -force-interpreter=false -disable-local-ra=false
+; RUN: llvm-as < %s | lli -force-interpreter=false -regalloc=simple
;-print-machineinstrs
int %main() {
diff --git a/test/CodeGen/X86/2002-12-23-SubProblem.llx b/test/CodeGen/X86/2002-12-23-SubProblem.llx
index 27823254841..5f5a4cffd17 100644
--- a/test/CodeGen/X86/2002-12-23-SubProblem.llx
+++ b/test/CodeGen/X86/2002-12-23-SubProblem.llx
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | lli -force-interpreter=false -disable-local-ra
+; RUN: llvm-as < %s | lli -force-interpreter=false -regalloc=simple
int %main(int %B) {
;%B = add int 0, 1