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Use object file specific section type for initial text section

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179494 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nico Rieck 2013-04-14 21:18:36 +00:00
parent 024d943bca
commit ef1762b6a1
20 changed files with 3 additions and 30 deletions
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7
lib/MC/MCAsmStreamer.cpp
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@ -131,12 +131,7 @@ public:
}
virtual void InitToTextSection() {
// FIXME, this is MachO specific, but the testsuite
// expects this.
SwitchSection(getContext().getMachOSection(
"__TEXT", "__text",
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
0, SectionKind::getText()));
SwitchSection(getContext().getObjectFileInfo()->getTextSection());
}
virtual void EmitLabel(MCSymbol *Symbol);

8
lib/MC/MCPureStreamer.cpp
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@ -12,9 +12,8 @@
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCObjectStreamer.h"
// FIXME: Remove this.
#include "llvm/MC/MCSectionMachO.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ErrorHandling.h"
@ -113,10 +112,7 @@ void MCPureStreamer::InitSections() {
}
void MCPureStreamer::InitToTextSection() {
// FIMXE: To what!?
SwitchSection(getContext().getMachOSection("__TEXT", "__text",
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
0, SectionKind::getText()));
SwitchSection(getContext().getObjectFileInfo()->getTextSection());
}
void MCPureStreamer::EmitLabel(MCSymbol *Symbol) {

1
test/MC/Disassembler/Mips/mips32.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x46 0x20 0x73 0x05

1
test/MC/Disassembler/Mips/mips32_le.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x05 0x73 0x20 0x46

1
test/MC/Disassembler/Mips/mips32r2.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x46 0x20 0x73 0x05

1
test/MC/Disassembler/Mips/mips32r2_le.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: abs.d $f12, $f14
0x05 0x73 0x20 0x46

1
test/MC/Disassembler/Mips/mips64.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0x67 0x4b 0x7c 0xcd

1
test/MC/Disassembler/Mips/mips64_le.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0xcd 0x7c 0x4b 0x67

1
test/MC/Disassembler/Mips/mips64r2.txt
View File

@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0x67 0x4b 0x7c 0xcd

1
test/MC/Disassembler/Mips/mips64r2_le.txt
View File

@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: daddiu $11, $26, 31949
0xcd 0x7c 0x4b 0x67

1
test/MC/Disassembler/XCore/xcore.txt
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@ -1,5 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
# 0r instructions

1
test/MC/Mips/mips-alu-instructions.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for arithmetic and logical instructions.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Logical instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/mips-expansions.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for macro instructions
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Load immediate instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/mips-fpu-instructions.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for FPU instructions.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# FP aritmetic instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/mips-jump-instructions.s
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@ -2,7 +2,6 @@
# RUN: FileCheck %s
# Check that the assembler can handle the documented syntax
# for jumps and branches.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Branch instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/mips-memory-instructions.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for loads and stores.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Memory store instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/mips-relocations.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for relocations.
# CHECK: .section __TEXT,__text,regular,pure_instructions
# CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
# CHECK: # fixup A - offset: 0, value: _gp_disp@ABS_HI, kind: fixup_Mips_HI16
# CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]

1
test/MC/Mips/mips64-alu-instructions.s
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@ -1,7 +1,6 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
# Check that the assembler can handle the documented syntax
# for arithmetic and logical instructions.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Logical instructions
#------------------------------------------------------------------------------

1
test/MC/Mips/nabi-regs.s
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@ -8,7 +8,6 @@
# RUN: -mcpu=mips64r2 -arch=mips64 | \
# RUN: FileCheck %s
# CHECK: .section __TEXT,__text,regular,pure_instructions
.text
foo:

1
test/MC/Mips/set-at-directive.s
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@ -3,7 +3,6 @@
# Check that the assembler can handle the documented syntax
# for ".set at" and set the correct value.
# CHECK: .section __TEXT,__text,regular,pure_instructions
.text
foo:
# CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00]