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Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137686 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2011-08-15 23:38:54 +00:00
parent 8400bfe9fa
commit ef2865a8ea
3 changed files with 27 additions and 20 deletions
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6
lib/Target/ARM/ARMInstrFormats.td
View File

@ -1548,7 +1548,7 @@ class NeonI<dag oops, dag iops, AddrMode am, IndexMode im, Format f,
let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm); let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);
let Pattern = pattern; let Pattern = pattern;
list<Predicate> Predicates = [HasNEON]; list<Predicate> Predicates = [HasNEON];
let DecoderNamespace = "NEONData"; let DecoderNamespace = "NEON";
} }
// Same as NeonI except it does not have a "data type" specifier. // Same as NeonI except it does not have a "data type" specifier.
@ -1561,7 +1561,7 @@ class NeonXI<dag oops, dag iops, AddrMode am, IndexMode im, Format f,
let AsmString = !strconcat(opc, "${p}", "\t", asm); let AsmString = !strconcat(opc, "${p}", "\t", asm);
let Pattern = pattern; let Pattern = pattern;
list<Predicate> Predicates = [HasNEON]; list<Predicate> Predicates = [HasNEON];
let DecoderNamespace = "NEONData"; let DecoderNamespace = "NEON";
} }
class NLdSt<bit op23, bits<2> op21_20, bits<4> op11_8, bits<4> op7_4, class NLdSt<bit op23, bits<2> op21_20, bits<4> op11_8, bits<4> op7_4,
@ -1620,6 +1620,7 @@ class NDataI<dag oops, dag iops, Format f, InstrItinClass itin,
pattern> { pattern> {
let Inst{31-25} = 0b1111001; let Inst{31-25} = 0b1111001;
let PostEncoderMethod = "NEONThumb2DataIPostEncoder"; let PostEncoderMethod = "NEONThumb2DataIPostEncoder";
let DecoderNamespace = "NEONData";
} }
class NDataXI<dag oops, dag iops, Format f, InstrItinClass itin, class NDataXI<dag oops, dag iops, Format f, InstrItinClass itin,
@ -1628,6 +1629,7 @@ class NDataXI<dag oops, dag iops, Format f, InstrItinClass itin,
cstr, pattern> { cstr, pattern> {
let Inst{31-25} = 0b1111001; let Inst{31-25} = 0b1111001;
let PostEncoderMethod = "NEONThumb2DataIPostEncoder"; let PostEncoderMethod = "NEONThumb2DataIPostEncoder";
let DecoderNamespace = "NEONData";
} }
// NEON "one register and a modified immediate" format. // NEON "one register and a modified immediate" format.

4
lib/Target/ARM/ARMInstrNEON.td
View File

@ -966,7 +966,7 @@ class VLD3DUP<bits<4> op7_4, string Dt>
(ins addrmode6dup:$Rn), IIC_VLD3dup, (ins addrmode6dup:$Rn), IIC_VLD3dup,
"vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn", "", []> { "vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn", "", []> {
let Rm = 0b1111; let Rm = 0b1111;
let Inst{4} = Rn{4}; let Inst{4} = 0;
let DecoderMethod = "DecodeVLD3DupInstruction"; let DecoderMethod = "DecodeVLD3DupInstruction";
} }
@ -989,7 +989,7 @@ class VLD3DUPWB<bits<4> op7_4, string Dt>
(ins addrmode6dup:$Rn, am6offset:$Rm), IIC_VLD3dupu, (ins addrmode6dup:$Rn, am6offset:$Rm), IIC_VLD3dupu,
"vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn$Rm", "vld3", Dt, "\\{$Vd[], $dst2[], $dst3[]\\}, $Rn$Rm",
"$Rn.addr = $wb", []> { "$Rn.addr = $wb", []> {
let Inst{4} = Rn{4}; let Inst{4} = 0;
let DecoderMethod = "DecodeVLD3DupInstruction"; let DecoderMethod = "DecodeVLD3DupInstruction";
} }

37
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -494,7 +494,28 @@ bool ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
} }
MI.clear(); MI.clear();
result = decodeNEONDupInstruction32(MI, insn32, Address, this);
if (result) {
Size = 4;
AddThumbPredicate(MI);
return true;
}
if (fieldFromInstruction32(insn32, 24, 8) == 0xF9) {
MI.clear();
uint32_t NEONLdStInsn = insn32;
NEONLdStInsn &= 0xF0FFFFFF;
NEONLdStInsn |= 0x04000000;
result = decodeNEONLoadStoreInstruction32(MI, NEONLdStInsn, Address, this);
if (result) {
Size = 4;
AddThumbPredicate(MI);
return true;
}
}
if (fieldFromInstruction32(insn32, 24, 4) == 0xF) { if (fieldFromInstruction32(insn32, 24, 4) == 0xF) {
MI.clear();
uint32_t NEONDataInsn = insn32; uint32_t NEONDataInsn = insn32;
NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
@ -507,22 +528,6 @@ bool ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
} }
} }
MI.clear();
result = decodeNEONLoadStoreInstruction32(MI, insn32, Address, this);
if (result) {
Size = 4;
AddThumbPredicate(MI);
return true;
}
MI.clear();
result = decodeNEONDupInstruction32(MI, insn32, Address, this);
if (result) {
Size = 4;
AddThumbPredicate(MI);
return true;
}
return false; return false;
} }