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https://github.com/c64scene-ar/llvm-6502.git
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R600/SI: Replace LDS atomics with no return versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217379 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
f1cd7ce098
commit
ef4bb30475
@ -1943,27 +1943,39 @@ void SITargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI,
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SDNode *Node) const {
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const SIInstrInfo *TII = static_cast<const SIInstrInfo *>(
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getTargetMachine().getSubtargetImpl()->getInstrInfo());
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if (!TII->isMIMG(MI->getOpcode()))
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if (TII->isMIMG(MI->getOpcode())) {
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unsigned VReg = MI->getOperand(0).getReg();
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unsigned Writemask = MI->getOperand(1).getImm();
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unsigned BitsSet = 0;
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for (unsigned i = 0; i < 4; ++i)
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BitsSet += Writemask & (1 << i) ? 1 : 0;
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const TargetRegisterClass *RC;
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switch (BitsSet) {
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default: return;
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case 1: RC = &AMDGPU::VReg_32RegClass; break;
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case 2: RC = &AMDGPU::VReg_64RegClass; break;
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case 3: RC = &AMDGPU::VReg_96RegClass; break;
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}
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unsigned NewOpcode = TII->getMaskedMIMGOp(MI->getOpcode(), BitsSet);
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MI->setDesc(TII->get(NewOpcode));
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MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
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MRI.setRegClass(VReg, RC);
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return;
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unsigned VReg = MI->getOperand(0).getReg();
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unsigned Writemask = MI->getOperand(1).getImm();
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unsigned BitsSet = 0;
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for (unsigned i = 0; i < 4; ++i)
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BitsSet += Writemask & (1 << i) ? 1 : 0;
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const TargetRegisterClass *RC;
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switch (BitsSet) {
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default: return;
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case 1: RC = &AMDGPU::VReg_32RegClass; break;
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case 2: RC = &AMDGPU::VReg_64RegClass; break;
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case 3: RC = &AMDGPU::VReg_96RegClass; break;
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}
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unsigned NewOpcode = TII->getMaskedMIMGOp(MI->getOpcode(), BitsSet);
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MI->setDesc(TII->get(NewOpcode));
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MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
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MRI.setRegClass(VReg, RC);
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// Replace unused atomics with the no return version.
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int NoRetAtomicOp = AMDGPU::getAtomicNoRetOp(MI->getOpcode());
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if (NoRetAtomicOp != -1) {
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if (!Node->hasAnyUseOfValue(0)) {
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MI->setDesc(TII->get(NoRetAtomicOp));
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MI->RemoveOperand(0);
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}
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return;
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}
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}
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MachineSDNode *SITargetLowering::AdjustRegClass(MachineSDNode *N,
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@ -884,6 +884,8 @@ class DS_1A1D_RET <bits<8> op, string asm, RegisterClass rc, string noRetOp = ""
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let data1 = 0;
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let mayStore = 1;
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let mayLoad = 1;
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let hasPostISelHook = 1; // Adjusted to no return version.
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}
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// 1 address, 2 data.
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@ -896,6 +898,8 @@ class DS_1A2D_RET <bits<8> op, string asm, RegisterClass rc, string noRetOp = ""
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AtomicNoRet<noRetOp, 1> {
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let mayStore = 1;
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let mayLoad = 1;
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let hasPostISelHook = 1; // Adjusted to no return version.
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}
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// 1 address, 2 data.
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@ -758,7 +758,7 @@ def DS_AND_RTN_B32 : DS_1A1D_RET <0x29, "DS_AND_RTN_B32", VReg_32, "DS_AND_B32">
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def DS_OR_RTN_B32 : DS_1A1D_RET <0x2a, "DS_OR_RTN_B32", VReg_32, "DS_OR_B32">;
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def DS_XOR_RTN_B32 : DS_1A1D_RET <0x2b, "DS_XOR_RTN_B32", VReg_32, "DS_XOR_B32">;
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def DS_MSKOR_RTN_B32 : DS_1A1D_RET <0x2c, "DS_MSKOR_RTN_B32", VReg_32, "DS_MSKOR_B32">;
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def DS_WRXCHG_RTN_B32 : DS_1A1D_RET <0x2d, "DS_WRXCHG_RTN_B32", VReg_32, "DS_WRXCHG_B32">;
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def DS_WRXCHG_RTN_B32 : DS_1A1D_RET <0x2d, "DS_WRXCHG_RTN_B32", VReg_32>;
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//def DS_WRXCHG2_RTN_B32 : DS_2A0D_RET <0x2e, "DS_WRXCHG2_RTN_B32", VReg_32, "DS_WRXCHG2_B32">;
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//def DS_WRXCHG2ST64_RTN_B32 : DS_2A0D_RET <0x2f, "DS_WRXCHG2_RTN_B32", VReg_32, "DS_WRXCHG2ST64_B32">;
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def DS_CMPST_RTN_B32 : DS_1A2D_RET <0x30, "DS_CMPST_RTN_B32", VReg_32, "DS_CMPST_B32">;
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@ -50,3 +50,36 @@ define void @lds_atomic_cmpxchg_ret_i32_bad_si_offset(i32 addrspace(1)* %out, i3
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_cmpxchg_noret_i32_offset:
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; SI: S_LOAD_DWORD [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
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; SI: S_LOAD_DWORD [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xa
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; SI-DAG: V_MOV_B32_e32 [[VCMP:v[0-9]+]], 7
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; SI-DAG: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[PTR]]
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; SI-DAG: V_MOV_B32_e32 [[VSWAP:v[0-9]+]], [[SWAP]]
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; SI: DS_CMPST_B32 [[VPTR]], [[VCMP]], [[VSWAP]], 0x10, [M0]
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; SI: S_ENDPGM
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define void @lds_atomic_cmpxchg_noret_i32_offset(i32 addrspace(3)* %ptr, i32 %swap) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%pair = cmpxchg i32 addrspace(3)* %gep, i32 7, i32 %swap seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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ret void
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}
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; FUNC-LABEL: @lds_atomic_cmpxchg_noret_i64_offset:
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; SI: S_LOAD_DWORD [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
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; SI: S_LOAD_DWORDX2 s{{\[}}[[LOSWAP:[0-9]+]]:[[HISWAP:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xb
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; SI: S_MOV_B64 s{{\[}}[[LOSCMP:[0-9]+]]:[[HISCMP:[0-9]+]]{{\]}}, 7
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; SI-DAG: V_MOV_B32_e32 v[[LOVCMP:[0-9]+]], s[[LOSCMP]]
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; SI-DAG: V_MOV_B32_e32 v[[HIVCMP:[0-9]+]], s[[HISCMP]]
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; SI-DAG: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[PTR]]
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; SI-DAG: V_MOV_B32_e32 v[[LOSWAPV:[0-9]+]], s[[LOSWAP]]
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; SI-DAG: V_MOV_B32_e32 v[[HISWAPV:[0-9]+]], s[[HISWAP]]
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; SI: DS_CMPST_B64 [[VPTR]], v{{\[}}[[LOVCMP]]:[[HIVCMP]]{{\]}}, v{{\[}}[[LOSWAPV]]:[[HISWAPV]]{{\]}}, 0x20, [M0]
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; SI: S_ENDPGM
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define void @lds_atomic_cmpxchg_noret_i64_offset(i64 addrspace(3)* %ptr, i64 %swap) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%pair = cmpxchg i64 addrspace(3)* %gep, i64 7, i64 %swap seq_cst monotonic
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%result = extractvalue { i64, i1 } %pair, 0
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ret void
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}
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@ -3,7 +3,7 @@
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; FUNC-LABEL: @atomic_add_local
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; R600: LDS_ADD *
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; SI: DS_ADD_RTN_U32
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; SI: DS_ADD_U32
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define void @atomic_add_local(i32 addrspace(3)* %local) {
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%unused = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
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ret void
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@ -11,7 +11,7 @@ define void @atomic_add_local(i32 addrspace(3)* %local) {
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; FUNC-LABEL: @atomic_add_local_const_offset
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; R600: LDS_ADD *
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; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: DS_ADD_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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define void @atomic_add_local_const_offset(i32 addrspace(3)* %local) {
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%gep = getelementptr i32 addrspace(3)* %local, i32 4
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%val = atomicrmw volatile add i32 addrspace(3)* %gep, i32 5 seq_cst
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@ -3,7 +3,7 @@
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; FUNC-LABEL: @atomic_sub_local
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; R600: LDS_SUB *
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; SI: DS_SUB_RTN_U32
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; SI: DS_SUB_U32
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define void @atomic_sub_local(i32 addrspace(3)* %local) {
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%unused = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
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ret void
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@ -11,7 +11,7 @@ define void @atomic_sub_local(i32 addrspace(3)* %local) {
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; FUNC-LABEL: @atomic_sub_local_const_offset
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; R600: LDS_SUB *
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; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: DS_SUB_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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define void @atomic_sub_local_const_offset(i32 addrspace(3)* %local) {
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%gep = getelementptr i32 addrspace(3)* %local, i32 4
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%val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst
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@ -279,3 +279,253 @@ define void @lds_atomic_umax_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspac
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @lds_atomic_xchg_noret_i32:
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; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
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; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
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; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: DS_WRXCHG_RTN_B32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0]
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; SI: S_ENDPGM
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define void @lds_atomic_xchg_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_xchg_noret_i32_offset:
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; SI: DS_WRXCHG_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_xchg_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst
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ret void
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}
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; XXX - Is it really necessary to load 4 into VGPR?
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; FUNC-LABEL: @lds_atomic_add_noret_i32:
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; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
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; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
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; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: DS_ADD_U32 [[VPTR]], [[DATA]], 0x0, [M0]
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; SI: S_ENDPGM
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define void @lds_atomic_add_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_add_noret_i32_offset:
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; SI: DS_ADD_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_add_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_add_noret_i32_bad_si_offset
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; SI: DS_ADD_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x0
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; CI: DS_ADD_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_add_noret_i32_bad_si_offset(i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind {
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%sub = sub i32 %a, %b
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%add = add i32 %sub, 4
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 %add
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_inc_noret_i32:
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; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1
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; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]]
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; SI: DS_INC_U32 v{{[0-9]+}}, [[NEGONE]], 0x0
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; SI: S_ENDPGM
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define void @lds_atomic_inc_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i32 addrspace(3)* %ptr, i32 1 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_inc_noret_i32_offset:
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; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1
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; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]]
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; SI: DS_INC_U32 v{{[0-9]+}}, [[NEGONE]], 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_inc_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_inc_noret_i32_bad_si_offset:
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; SI: DS_INC_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x0
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; CI: DS_INC_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_inc_noret_i32_bad_si_offset(i32 addrspace(3)* %ptr, i32 %a, i32 %b) nounwind {
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%sub = sub i32 %a, %b
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%add = add i32 %sub, 4
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 %add
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%result = atomicrmw add i32 addrspace(3)* %gep, i32 1 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_sub_noret_i32:
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; SI: DS_SUB_U32
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; SI: S_ENDPGM
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define void @lds_atomic_sub_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_sub_noret_i32_offset:
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; SI: DS_SUB_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_sub_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i32 addrspace(3)* %gep, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_dec_noret_i32:
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; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1
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; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]]
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; SI: DS_DEC_U32 v{{[0-9]+}}, [[NEGONE]], 0x0
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; SI: S_ENDPGM
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define void @lds_atomic_dec_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i32 addrspace(3)* %ptr, i32 1 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_dec_noret_i32_offset:
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; SI: S_MOV_B32 [[SNEGONE:s[0-9]+]], -1
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; SI: V_MOV_B32_e32 [[NEGONE:v[0-9]+]], [[SNEGONE]]
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; SI: DS_DEC_U32 v{{[0-9]+}}, [[NEGONE]], 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_dec_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i32 addrspace(3)* %gep, i32 1 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_and_noret_i32:
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; SI: DS_AND_B32
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; SI: S_ENDPGM
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define void @lds_atomic_and_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw and i32 addrspace(3)* %ptr, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_and_noret_i32_offset:
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; SI: DS_AND_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
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; SI: S_ENDPGM
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define void @lds_atomic_and_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
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%result = atomicrmw and i32 addrspace(3)* %gep, i32 4 seq_cst
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ret void
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}
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; FUNC-LABEL: @lds_atomic_or_noret_i32:
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; SI: DS_OR_B32
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; SI: S_ENDPGM
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define void @lds_atomic_or_noret_i32(i32 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst
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ret void
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}
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|
||||
; FUNC-LABEL: @lds_atomic_or_noret_i32_offset:
|
||||
; SI: DS_OR_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_or_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw or i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xor_noret_i32:
|
||||
; SI: DS_XOR_B32
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xor_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw xor i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xor_noret_i32_offset:
|
||||
; SI: DS_XOR_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xor_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw xor i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FIXME: There is no atomic nand instr
|
||||
; XFUNC-LABEL: @lds_atomic_nand_noret_i32:uction, so we somehow need to expand this.
|
||||
; define void @lds_atomic_nand_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
; %result = atomicrmw nand i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
; ret void
|
||||
; }
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_min_noret_i32:
|
||||
; SI: DS_MIN_I32
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_min_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw min i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_min_noret_i32_offset:
|
||||
; SI: DS_MIN_I32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_min_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw min i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_max_noret_i32:
|
||||
; SI: DS_MAX_I32
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_max_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw max i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_max_noret_i32_offset:
|
||||
; SI: DS_MAX_I32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_max_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw max i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umin_noret_i32:
|
||||
; SI: DS_MIN_U32
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umin_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw umin i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umin_noret_i32_offset:
|
||||
; SI: DS_MIN_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umin_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw umin i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umax_noret_i32:
|
||||
; SI: DS_MAX_U32
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umax_noret_i32(i32 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw umax i32 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umax_noret_i32_offset:
|
||||
; SI: DS_MAX_U32 v{{[0-9]+}}, v{{[0-9]+}}, 0x10
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umax_noret_i32_offset(i32 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i32 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw umax i32 addrspace(3)* %gep, i32 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -249,3 +249,225 @@ define void @lds_atomic_umax_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspac
|
||||
store i64 %result, i64 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xchg_noret_i64:
|
||||
; SI: DS_WRXCHG_RTN_B64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xchg_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw xchg i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xchg_noret_i64_offset:
|
||||
; SI: DS_WRXCHG_RTN_B64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xchg_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw xchg i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_add_noret_i64:
|
||||
; SI: DS_ADD_U64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_add_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw add i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_add_noret_i64_offset:
|
||||
; SI: S_LOAD_DWORD [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
|
||||
; SI: S_MOV_B64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, 9
|
||||
; SI-DAG: V_MOV_B32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
|
||||
; SI-DAG: V_MOV_B32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
|
||||
; SI-DAG: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[PTR]]
|
||||
; SI: DS_ADD_U64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}}, 0x20, [M0]
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_add_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i64 4
|
||||
%result = atomicrmw add i64 addrspace(3)* %gep, i64 9 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_inc_noret_i64:
|
||||
; SI: S_MOV_B64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
|
||||
; SI-DAG: V_MOV_B32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
|
||||
; SI-DAG: V_MOV_B32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
|
||||
; SI: DS_INC_U64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}},
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_inc_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw add i64 addrspace(3)* %ptr, i64 1 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_inc_noret_i64_offset:
|
||||
; SI: DS_INC_U64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_inc_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw add i64 addrspace(3)* %gep, i64 1 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_sub_noret_i64:
|
||||
; SI: DS_SUB_U64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_sub_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_sub_noret_i64_offset:
|
||||
; SI: DS_SUB_U64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_sub_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw sub i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_dec_noret_i64:
|
||||
; SI: S_MOV_B64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
|
||||
; SI-DAG: V_MOV_B32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
|
||||
; SI-DAG: V_MOV_B32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
|
||||
; SI: DS_DEC_U64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}},
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_dec_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 1 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_dec_noret_i64_offset:
|
||||
; SI: DS_DEC_U64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_dec_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw sub i64 addrspace(3)* %gep, i64 1 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_and_noret_i64:
|
||||
; SI: DS_AND_B64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_and_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw and i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_and_noret_i64_offset:
|
||||
; SI: DS_AND_B64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_and_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw and i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_or_noret_i64:
|
||||
; SI: DS_OR_B64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_or_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw or i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_or_noret_i64_offset:
|
||||
; SI: DS_OR_B64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_or_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw or i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xor_noret_i64:
|
||||
; SI: DS_XOR_B64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xor_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw xor i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_xor_noret_i64_offset:
|
||||
; SI: DS_XOR_B64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_xor_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw xor i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FIXME: There is no atomic nand instr
|
||||
; XFUNC-LABEL: @lds_atomic_nand_noret_i64:uction, so we somehow need to expand this.
|
||||
; define void @lds_atomic_nand_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
; %result = atomicrmw nand i64 addrspace(3)* %ptr, i32 4 seq_cst
|
||||
; ret void
|
||||
; }
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_min_noret_i64:
|
||||
; SI: DS_MIN_I64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_min_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw min i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_min_noret_i64_offset:
|
||||
; SI: DS_MIN_I64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_min_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw min i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_max_noret_i64:
|
||||
; SI: DS_MAX_I64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_max_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw max i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_max_noret_i64_offset:
|
||||
; SI: DS_MAX_I64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_max_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw max i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umin_noret_i64:
|
||||
; SI: DS_MIN_U64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umin_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw umin i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umin_noret_i64_offset:
|
||||
; SI: DS_MIN_U64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umin_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw umin i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umax_noret_i64:
|
||||
; SI: DS_MAX_U64
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umax_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
||||
%result = atomicrmw umax i64 addrspace(3)* %ptr, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: @lds_atomic_umax_noret_i64_offset:
|
||||
; SI: DS_MAX_U64 {{.*}} 0x20
|
||||
; SI: S_ENDPGM
|
||||
define void @lds_atomic_umax_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
||||
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
||||
%result = atomicrmw umax i64 addrspace(3)* %gep, i64 4 seq_cst
|
||||
ret void
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user