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Propagate debug loc info through prologue/epilogue.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65298 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2009-02-23 00:42:30 +00:00
parent 4214a5531c
commit ef4cfc749a
7 changed files with 39 additions and 28 deletions
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18
lib/Target/Sparc/SparcRegisterInfo.cpp
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@@ -120,7 +120,9 @@ processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
void SparcRegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock &MBB = MF.front();
MachineFrameInfo *MFI = MF.getFrameInfo();
DebugLoc dl = DebugLoc::getUnknownLoc();
MachineBasicBlock::iterator MBBI = MBB.begin();
DebugLoc dl = (MBBI != MBB.end() ?
MBBI->getDebugLoc() : DebugLoc::getUnknownLoc());
// Get the number of bytes to allocate from the FrameInfo
int NumBytes = (int) MFI->getStackSize();
@@ -133,24 +135,24 @@ void SparcRegisterInfo::emitPrologue(MachineFunction &MF) const {
// ----------
// 23 words * 4 bytes per word = 92 bytes
NumBytes += 92;
// Round up to next doubleword boundary -- a double-word boundary
// is required by the ABI.
NumBytes = (NumBytes + 7) & ~7;
NumBytes = -NumBytes;
if (NumBytes >= -4096) {
BuildMI(MBB, MBB.begin(), dl, TII.get(SP::SAVEri),
SP::O6).addReg(SP::O6).addImm(NumBytes);
BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
.addReg(SP::O6).addImm(NumBytes);
} else {
MachineBasicBlock::iterator InsertPt = MBB.begin();
// Emit this the hard way. This clobbers G1 which we always know is
// available here.
unsigned OffHi = (unsigned)NumBytes >> 10U;
BuildMI(MBB, InsertPt, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
// Emit G1 = G1 + I6
BuildMI(MBB, InsertPt, dl, TII.get(SP::ORri), SP::G1)
BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
.addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
BuildMI(MBB, InsertPt, dl, TII.get(SP::SAVErr), SP::O6)
BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
.addReg(SP::O6).addReg(SP::G1);
}
}
@@ -158,7 +160,7 @@ void SparcRegisterInfo::emitPrologue(MachineFunction &MF) const {
void SparcRegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineBasicBlock::iterator MBBI = prior(MBB.end());
DebugLoc dl = DebugLoc::getUnknownLoc();
DebugLoc dl = MBBI->getDebugLoc();
assert(MBBI->getOpcode() == SP::RETL &&
"Can only put epilog before 'retl' instruction!");
BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)