From ef521f14b7046a0f7ec169696a13b473c3ab4aee Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Thu, 14 Aug 2008 22:53:18 +0000 Subject: [PATCH] Also avoid pinsrw and pinsrb with a variable insertelement index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54803 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6b95034c02b..6488a1a8327 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4143,7 +4143,8 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG){ SDValue N1 = Op.getOperand(1); SDValue N2 = Op.getOperand(2); - if ((EVT.getSizeInBits() == 8) || (EVT.getSizeInBits() == 16)) { + if ((EVT.getSizeInBits() == 8 || EVT.getSizeInBits() == 16) && + isa(N2)) { unsigned Opc = (EVT.getSizeInBits() == 8) ? X86ISD::PINSRB : X86ISD::PINSRW; // Transform it so it match pinsr{b,w} which expects a GR32 as its second