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rearrange a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117967 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1255,58 +1255,9 @@ include "X86InstrSystem.td"
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include "X86InstrCompiler.td"
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//===----------------------------------------------------------------------===//
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// Assembler Aliases
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// Assembler Mnemonic Aliases
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//===----------------------------------------------------------------------===//
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// movsx aliases
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def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX16rr8W GR16:$dst, GR8:$src)>;
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def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
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"movsx $src, $dst",
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(MOVSX16rm8W GR16:$dst, i8mem:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX32rr8 GR32:$dst, GR8:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
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"movsx $src, $dst",
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(MOVSX32rr16 GR32:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX64rr8 GR64:$dst, GR8:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
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"movsx $src, $dst",
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(MOVSX64rr16 GR64:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
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"movsx $src, $dst",
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(MOVSX64rr32 GR64:$dst, GR32:$src)>;
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// movzx aliases
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def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX16rr8W GR16:$dst, GR8:$src)>;
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def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
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"movzx $src, $dst",
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(MOVZX16rm8W GR16:$dst, i8mem:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX32rr8 GR32:$dst, GR8:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
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"movzx $src, $dst",
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(MOVZX32rr16 GR32:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
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"movzx $src, $dst",
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(MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
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// Note: No GR32->GR64 movzx form.
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def : MnemonicAlias<"call", "calll">, Requires<[In32BitMode]>;
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def : MnemonicAlias<"call", "callq">, Requires<[In64BitMode]>;
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@ -1414,3 +1365,57 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "w">;
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defm : IntegerCondCodeMnemonicAlias<"cmov", "l">;
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defm : IntegerCondCodeMnemonicAlias<"cmov", "q">;
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//===----------------------------------------------------------------------===//
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// Assembler Instruction Aliases
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//===----------------------------------------------------------------------===//
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// movsx aliases
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def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX16rr8W GR16:$dst, GR8:$src)>;
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def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
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"movsx $src, $dst",
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(MOVSX16rm8W GR16:$dst, i8mem:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX32rr8 GR32:$dst, GR8:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
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"movsx $src, $dst",
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(MOVSX32rr16 GR32:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
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"movsx $src, $dst",
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(MOVSX64rr8 GR64:$dst, GR8:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
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"movsx $src, $dst",
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(MOVSX64rr16 GR64:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
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"movsx $src, $dst",
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(MOVSX64rr32 GR64:$dst, GR32:$src)>;
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// movzx aliases
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def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX16rr8W GR16:$dst, GR8:$src)>;
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def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
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"movzx $src, $dst",
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(MOVZX16rm8W GR16:$dst, i8mem:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX32rr8 GR32:$dst, GR8:$src)>;
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def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
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"movzx $src, $dst",
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(MOVZX32rr16 GR32:$dst, GR16:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
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"movzx $src, $dst",
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(MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
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def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
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"movzx $src, $dst",
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(MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
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// Note: No GR32->GR64 movzx form.
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