rearrange a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117967 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-01 23:07:52 +00:00
parent b796bbb6de
commit efd8dadb4f

View File

@ -1255,58 +1255,9 @@ include "X86InstrSystem.td"
include "X86InstrCompiler.td"
//===----------------------------------------------------------------------===//
// Assembler Aliases
// Assembler Mnemonic Aliases
//===----------------------------------------------------------------------===//
// movsx aliases
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
"movsx $src, $dst",
(MOVSX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
"movsx $src, $dst",
(MOVSX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX64rr8 GR64:$dst, GR8:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
"movsx $src, $dst",
(MOVSX64rr16 GR64:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
"movsx $src, $dst",
(MOVSX64rr32 GR64:$dst, GR32:$src)>;
// movzx aliases
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
"movzx $src, $dst",
(MOVZX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
"movzx $src, $dst",
(MOVZX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
"movzx $src, $dst",
(MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
// Note: No GR32->GR64 movzx form.
def : MnemonicAlias<"call", "calll">, Requires<[In32BitMode]>;
def : MnemonicAlias<"call", "callq">, Requires<[In64BitMode]>;
@ -1414,3 +1365,57 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "w">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "l">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "q">;
//===----------------------------------------------------------------------===//
// Assembler Instruction Aliases
//===----------------------------------------------------------------------===//
// movsx aliases
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
"movsx $src, $dst",
(MOVSX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
"movsx $src, $dst",
(MOVSX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX64rr8 GR64:$dst, GR8:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
"movsx $src, $dst",
(MOVSX64rr16 GR64:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR32:$src),
"movsx $src, $dst",
(MOVSX64rr32 GR64:$dst, GR32:$src)>;
// movzx aliases
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX16rr8W GR16:$dst, GR8:$src)>;
def : InstAlias<(outs GR16:$dst), (ins i8mem:$src),
"movzx $src, $dst",
(MOVZX16rm8W GR16:$dst, i8mem:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX32rr8 GR32:$dst, GR8:$src)>;
def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
"movzx $src, $dst",
(MOVZX32rr16 GR32:$dst, GR16:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR8 :$src),
"movzx $src, $dst",
(MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
def : InstAlias<(outs GR64:$dst), (ins GR16:$src),
"movzx $src, $dst",
(MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
// Note: No GR32->GR64 movzx form.