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Fix merging base-updates for VLDM/VSTM: Before I switched these instructions

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to use AddrMode4, there was a count of the registers stored in one of the
operands.  I changed that to just count the operands but forgot to adjust for
the size of D registers.  This was noticed by Evan as a performance problem
but it is a potential correctness bug as well, since it is possible that this
could merge a base update with a non-matching immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113576 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2010-09-10 05:15:04 +00:00
parent 3ef1c8759a
commit efe7d9a12f
2 changed files with 7 additions and 2 deletions
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3
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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@@ -458,9 +458,10 @@ static inline unsigned getLSMultipleTransferSize(MachineInstr *MI) {
case ARM::t2STM:
case ARM::VLDMS:
case ARM::VSTMS:
return (MI->getNumOperands() - 4) * 4;
case ARM::VLDMD:
case ARM::VSTMD:
return (MI->getNumOperands() - 4) * 4;
return (MI->getNumOperands() - 4) * 8;
}
}