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implement .ll and .bc support for nsw/nuw on shl and exact on lshr/ashr.

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Factor some code better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125006 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2011-02-07 16:40:21 +00:00
parent 163a84bbce
commit f067d584a8
8 changed files with 239 additions and 211 deletions
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28
docs/LangRef.html
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@@ -3684,7 +3684,10 @@ Instruction</a> </div>
<h5>Syntax:</h5>
<pre>
&lt;result&gt; = shl &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = shl &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = shl nuw &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = shl nsw &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = shl nuw nsw &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
@@ -3704,6 +3707,14 @@ Instruction</a> </div>
vectors, each vector element of <tt>op1</tt> is shifted by the corresponding
shift amount in <tt>op2</tt>.</p>
<p>If the <tt>nuw</tt> keyword is present, then the shift produces a
<a href="#trapvalues">trap value</a> if it shifts out any non-zero bits. If
the <tt>nsw</tt> keywrod is present, then the shift produces a
<a href="#trapvalues">trap value</a> if it shifts out any bits that disagree
with the resultant sign bit. As such, NUW/NSW have the same semantics as
they would if the shift were expressed as a mul instruction with the same
nsw/nuw bits in (mul %op1, (shl 1, %op2)).</p>
<h5>Example:</h5>
<pre>
&lt;result&gt; = shl i32 4, %var <i>; yields {i32}: 4 &lt;&lt; %var</i>
@@ -3723,7 +3734,8 @@ Instruction</a> </div>
<h5>Syntax:</h5>
<pre>
&lt;result&gt; = lshr &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = lshr &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = lshr exact &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
@@ -3743,6 +3755,11 @@ Instruction</a> </div>
vectors, each vector element of <tt>op1</tt> is shifted by the corresponding
shift amount in <tt>op2</tt>.</p>
<p>If the <tt>exact</tt> keyword is present, the result value of the
<tt>lshr</tt> is a <a href="#trapvalues">trap value</a> if any of the bits
shifted out are non-zero.</p>
<h5>Example:</h5>
<pre>
&lt;result&gt; = lshr i32 4, 1 <i>; yields {i32}:result = 2</i>
@@ -3762,7 +3779,8 @@ Instruction</a> </div>
<h5>Syntax:</h5>
<pre>
&lt;result&gt; = ashr &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = ashr &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
&lt;result&gt; = ashr exact &lt;ty&gt; &lt;op1&gt;, &lt;op2&gt; <i>; yields {ty}:result</i>
</pre>
<h5>Overview:</h5>
@@ -3783,6 +3801,10 @@ Instruction</a> </div>
the arguments are vectors, each vector element of <tt>op1</tt> is shifted by
the corresponding shift amount in <tt>op2</tt>.</p>
<p>If the <tt>exact</tt> keyword is present, the result value of the
<tt>ashr</tt> is a <a href="#trapvalues">trap value</a> if any of the bits
shifted out are non-zero.</p>
<h5>Example:</h5>
<pre>
&lt;result&gt; = ashr i32 4, 1 <i>; yields {i32}:result = 2</i>