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Eliminate some malloc traffic by allocating vectors on the stack. Change some

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method that took std::vector<SDOperand> to take a pointer to a first operand
and #operands.

This speeds up isel on kc++ by about 3%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29561 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-08-08 01:09:31 +00:00
parent 8de353df9d
commit f06f35e30b
4 changed files with 85 additions and 101 deletions
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29
include/llvm/CodeGen/SelectionDAG.h
View File

@ -171,10 +171,8 @@ public:
std::vector<MVT::ValueType> ResultTys;
ResultTys.push_back(VT);
ResultTys.push_back(MVT::Other);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(getRegister(Reg, VT));
return getNode(ISD::CopyFromReg, ResultTys, Ops);
SDOperand Ops[] = { Chain, getRegister(Reg, VT) };
return getNode(ISD::CopyFromReg, ResultTys, Ops, 2);
}
// This version of the getCopyFromReg method takes an extra operand, which
@ -186,11 +184,8 @@ public:
ResultTys.push_back(VT);
ResultTys.push_back(MVT::Other);
ResultTys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(getRegister(Reg, VT));
if (Flag.Val) Ops.push_back(Flag);
return getNode(ISD::CopyFromReg, ResultTys, Ops);
SDOperand Ops[] = { Chain, getRegister(Reg, VT), Flag };
return getNode(ISD::CopyFromReg, ResultTys, Ops, Flag.Val ? 3 : 2);
}
SDOperand getCondCode(ISD::CondCode Cond);
@ -205,10 +200,8 @@ public:
std::vector<MVT::ValueType> ResultTys;
ResultTys.push_back(MVT::Other);
ResultTys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(Op);
return getNode(ISD::CALLSEQ_START, ResultTys, Ops);
SDOperand Ops[] = { Chain, Op };
return getNode(ISD::CALLSEQ_START, ResultTys, Ops, 2);
}
/// getNode - Gets or creates the specified node.
@ -229,6 +222,12 @@ public:
SDOperand getNode(unsigned Opcode, std::vector<MVT::ValueType> &ResultTys,
std::vector<SDOperand> &Ops);
SDOperand getNode(unsigned Opcode, MVT::ValueType VT,
const SDOperand *Ops, unsigned NumOps);
SDOperand getNode(unsigned Opcode, std::vector<MVT::ValueType> &ResultTys,
const SDOperand *Ops, unsigned NumOps);
/// getSetCC - Helper function to make it easier to build SetCC's if you just
/// have an ISD::CondCode instead of an SDOperand.
///
@ -278,7 +277,7 @@ public:
SDOperand Op3, SDOperand Op4);
SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
SDOperand Op3, SDOperand Op4, SDOperand Op5);
SDOperand UpdateNodeOperands(SDOperand N, const std::vector<SDOperand> &Op);
SDOperand UpdateNodeOperands(SDOperand N, SDOperand *Ops, unsigned NumOps);
/// SelectNodeTo - These are used for target selectors to *mutate* the
/// specified node to have the specified return type, Target opcode, and
@ -445,7 +444,7 @@ private:
SDNode *FindModifiedNodeSlot(SDNode *N, SDOperand Op, void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, SDOperand Op1, SDOperand Op2,
void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, const std::vector<SDOperand> &Ops,
SDNode *FindModifiedNodeSlot(SDNode *N, const SDOperand *Ops, unsigned NumOps,
void *&InsertPos);
void DeleteNodeNotInCSEMaps(SDNode *N);

8
include/llvm/CodeGen/SelectionDAGNodes.h
View File

@ -865,13 +865,13 @@ protected:
Prev = 0; Next = 0;
NextInBucket = 0;
}
SDNode(unsigned Opc, const std::vector<SDOperand> &Nodes)
SDNode(unsigned Opc, const SDOperand *Ops, unsigned NumOps)
: NodeType(Opc), NodeId(-1) {
NumOperands = Nodes.size();
NumOperands = NumOps;
OperandList = new SDOperand[NumOperands];
for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
OperandList[i] = Nodes[i];
for (unsigned i = 0, e = NumOps; i != e; ++i) {
OperandList[i] = Ops[i];
SDNode *N = OperandList[i].Val;
N->Uses.push_back(this);
}

44
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Visibility.h"
#include "llvm/ADT/SmallVector.h"
#include <iostream>
#include <map>
using namespace llvm;
@ -541,11 +542,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
if (Node->getOpcode() >= ISD::BUILTIN_OP_END) {
// If this is a target node, legalize it by legalizing the operands then
// passing it through.
std::vector<SDOperand> Ops;
SmallVector<SDOperand, 8> Ops;
for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i)
Ops.push_back(LegalizeOp(Node->getOperand(i)));
Result = DAG.UpdateNodeOperands(Result.getValue(0), Ops);
Result = DAG.UpdateNodeOperands(Result.getValue(0), &Ops[0], Ops.size());
for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i)
AddLegalizedOperand(Op.getValue(i), Result.getValue(i));
@ -621,10 +622,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_VOID: {
std::vector<SDOperand> Ops;
SmallVector<SDOperand, 8> Ops;
for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i)
Ops.push_back(LegalizeOp(Node->getOperand(i)));
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
// Allow the target to custom lower its intrinsics if it wants to.
if (TLI.getOperationAction(Node->getOpcode(), MVT::Other) ==
@ -690,7 +691,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
case TargetLowering::Legal:
if (Tmp1 != Node->getOperand(0) ||
getTypeAction(Node->getOperand(1).getValueType()) == Promote) {
std::vector<SDOperand> Ops;
SmallVector<SDOperand, 8> Ops;
Ops.push_back(Tmp1);
if (getTypeAction(Node->getOperand(1).getValueType()) == Legal) {
Ops.push_back(Node->getOperand(1)); // line # must be legal.
@ -702,7 +703,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
}
Ops.push_back(Node->getOperand(3)); // filename must be legal.
Ops.push_back(Node->getOperand(4)); // working dir # must be legal.
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
}
break;
}
@ -815,11 +816,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
Tmp3 = LegalizeOp(Node->getOperand(2));
Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
} else {
std::vector<SDOperand> Ops;
SmallVector<SDOperand, 8> Ops;
// Legalize the operands.
for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i)
Ops.push_back(LegalizeOp(Node->getOperand(i)));
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
}
break;
@ -1074,9 +1075,9 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// Do not try to legalize the target-specific arguments (#1+).
if (Tmp1 != Node->getOperand(0)) {
std::vector<SDOperand> Ops(Node->op_begin(), Node->op_end());
SmallVector<SDOperand, 8> Ops(Node->op_begin(), Node->op_end());
Ops[0] = Tmp1;
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
}
// Remember that the CALLSEQ_START is legalized.
@ -1117,18 +1118,18 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// an optional flag input.
if (Node->getOperand(Node->getNumOperands()-1).getValueType() != MVT::Flag){
if (Tmp1 != Node->getOperand(0)) {
std::vector<SDOperand> Ops(Node->op_begin(), Node->op_end());
SmallVector<SDOperand, 8> Ops(Node->op_begin(), Node->op_end());
Ops[0] = Tmp1;
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
}
} else {
Tmp2 = LegalizeOp(Node->getOperand(Node->getNumOperands()-1));
if (Tmp1 != Node->getOperand(0) ||
Tmp2 != Node->getOperand(Node->getNumOperands()-1)) {
std::vector<SDOperand> Ops(Node->op_begin(), Node->op_end());
SmallVector<SDOperand, 8> Ops(Node->op_begin(), Node->op_end());
Ops[0] = Tmp1;
Ops.back() = Tmp2;
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
}
}
assert(IsLegalizingCall && "Call sequence imbalance between start/end?");
@ -1181,7 +1182,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
return Op.ResNo ? Tmp2 : Tmp1;
}
case ISD::INLINEASM: {
std::vector<SDOperand> Ops(Node->op_begin(), Node->op_end());
SmallVector<SDOperand, 8> Ops(Node->op_begin(), Node->op_end());
bool Changed = false;
// Legalize all of the operands of the inline asm, in case they are nodes
// that need to be expanded or something. Note we skip the asm string and
@ -1209,7 +1210,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
}
if (Changed)
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
// INLINE asm returns a chain and flag, make sure to add both to the map.
AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0));
@ -1545,7 +1546,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
Result = DAG.UpdateNodeOperands(Result, Tmp1);
break;
default: { // ret <values>
std::vector<SDOperand> NewValues;
SmallVector<SDOperand, 8> NewValues;
NewValues.push_back(Tmp1);
for (unsigned i = 1, e = Node->getNumOperands(); i < e; i += 2)
switch (getTypeAction(Node->getOperand(i).getValueType())) {
@ -1569,9 +1570,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
}
if (NewValues.size() == Node->getNumOperands())
Result = DAG.UpdateNodeOperands(Result, NewValues);
Result = DAG.UpdateNodeOperands(Result, &NewValues[0],NewValues.size());
else
Result = DAG.getNode(ISD::RET, MVT::Other, NewValues);
Result = DAG.getNode(ISD::RET, MVT::Other,
&NewValues[0], NewValues.size());
break;
}
}
@ -2069,14 +2071,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
case ISD::SHL_PARTS:
case ISD::SRA_PARTS:
case ISD::SRL_PARTS: {
std::vector<SDOperand> Ops;
SmallVector<SDOperand, 8> Ops;
bool Changed = false;
for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
Ops.push_back(LegalizeOp(Node->getOperand(i)));
Changed |= Ops.back() != Node->getOperand(i);
}
if (Changed)
Result = DAG.UpdateNodeOperands(Result, Ops);
Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
switch (TLI.getOperationAction(Node->getOpcode(),
Node->getValueType(0))) {

105
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -526,7 +526,7 @@ SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
/// return null, otherwise return a pointer to the slot it would take. If a
/// node already exists with these operands, the slot will be non-null.
SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
const std::vector<SDOperand> &Ops,
const SDOperand *Ops,unsigned NumOps,
void *&InsertPos) {
if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
return 0; // Never add these nodes.
@ -539,7 +539,7 @@ SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
SelectionDAGCSEMap::NodeID ID;
ID.SetOpcode(N->getOpcode());
ID.SetValueTypes(N->value_begin());
ID.SetOperands(&Ops[0], Ops.size());
ID.SetOperands(Ops, NumOps);
return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
}
@ -1498,26 +1498,15 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4) {
std::vector<SDOperand> Ops;
Ops.reserve(4);
Ops.push_back(N1);
Ops.push_back(N2);
Ops.push_back(N3);
Ops.push_back(N4);
return getNode(Opcode, VT, Ops);
SDOperand Ops[] = { N1, N2, N3, N4 };
return getNode(Opcode, VT, Ops, 4);
}
SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4, SDOperand N5) {
std::vector<SDOperand> Ops;
Ops.reserve(5);
Ops.push_back(N1);
Ops.push_back(N2);
Ops.push_back(N3);
Ops.push_back(N4);
Ops.push_back(N5);
return getNode(Opcode, VT, Ops);
SDOperand Ops[] = { N1, N2, N3, N4, N5 };
return getNode(Opcode, VT, Ops, 5);
}
SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
@ -1539,17 +1528,12 @@ SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
SDOperand SelectionDAG::getVecLoad(unsigned Count, MVT::ValueType EVT,
SDOperand Chain, SDOperand Ptr,
SDOperand SV) {
std::vector<SDOperand> Ops;
Ops.reserve(5);
Ops.push_back(Chain);
Ops.push_back(Ptr);
Ops.push_back(SV);
Ops.push_back(getConstant(Count, MVT::i32));
Ops.push_back(getValueType(EVT));
SDOperand Ops[] = { Chain, Ptr, SV, getConstant(Count, MVT::i32),
getValueType(EVT) };
std::vector<MVT::ValueType> VTs;
VTs.reserve(2);
VTs.push_back(MVT::Vector); VTs.push_back(MVT::Other); // Add token chain.
return getNode(ISD::VLOAD, VTs, Ops);
return getNode(ISD::VLOAD, VTs, Ops, 5);
}
SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT,
@ -1593,8 +1577,8 @@ SDOperand SelectionDAG::getVAArg(MVT::ValueType VT,
}
SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
std::vector<SDOperand> &Ops) {
switch (Ops.size()) {
const SDOperand *Ops, unsigned NumOps) {
switch (NumOps) {
case 0: return getNode(Opcode, VT);
case 1: return getNode(Opcode, VT, Ops[0]);
case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
@ -1605,7 +1589,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
switch (Opcode) {
default: break;
case ISD::TRUNCSTORE: {
assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
assert(NumOps == 5 && "TRUNCSTORE takes 5 operands!");
MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
// If this is a truncating store of a constant, convert to the desired type
@ -1625,7 +1609,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
}
case ISD::SELECT_CC: {
assert(Ops.size() == 5 && "SELECT_CC takes 5 operands!");
assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
assert(Ops[0].getValueType() == Ops[1].getValueType() &&
"LHS and RHS of condition must have same type!");
assert(Ops[2].getValueType() == Ops[3].getValueType() &&
@ -1635,7 +1619,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
}
case ISD::BR_CC: {
assert(Ops.size() == 5 && "BR_CC takes 5 operands!");
assert(NumOps == 5 && "BR_CC takes 5 operands!");
assert(Ops[2].getValueType() == Ops[3].getValueType() &&
"LHS/RHS of comparison should match types!");
break;
@ -1646,15 +1630,15 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
SDNode *N;
MVT::ValueType *VTs = getNodeValueTypes(VT);
if (VT != MVT::Flag) {
SelectionDAGCSEMap::NodeID ID(Opcode, VTs, &Ops[0], Ops.size());
SelectionDAGCSEMap::NodeID ID(Opcode, VTs, Ops, NumOps);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
N = new SDNode(Opcode, Ops);
N = new SDNode(Opcode, Ops, NumOps);
N->setValueTypes(VTs, 1);
CSEMap.InsertNode(N, IP);
} else {
N = new SDNode(Opcode, Ops);
N = new SDNode(Opcode, Ops, NumOps);
N->setValueTypes(VTs, 1);
}
AllNodes.push_back(N);
@ -1663,16 +1647,16 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
SDOperand SelectionDAG::getNode(unsigned Opcode,
std::vector<MVT::ValueType> &ResultTys,
std::vector<SDOperand> &Ops) {
const SDOperand *Ops, unsigned NumOps) {
if (ResultTys.size() == 1)
return getNode(Opcode, ResultTys[0], Ops);
return getNode(Opcode, ResultTys[0], Ops, NumOps);
switch (Opcode) {
case ISD::EXTLOAD:
case ISD::SEXTLOAD:
case ISD::ZEXTLOAD: {
MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT();
assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
assert(NumOps == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
// If they are asking for an extending load from/to the same thing, return a
// normal load.
if (ResultTys[0] == EVT)
@ -1720,21 +1704,33 @@ SDOperand SelectionDAG::getNode(unsigned Opcode,
SelectionDAGCSEMap::NodeID ID;
ID.SetOpcode(Opcode);
ID.SetValueTypes(VTs);
ID.SetOperands(&Ops[0], Ops.size());
ID.SetOperands(&Ops[0], NumOps);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
N = new SDNode(Opcode, Ops);
N = new SDNode(Opcode, Ops, NumOps);
N->setValueTypes(VTs, ResultTys.size());
CSEMap.InsertNode(N, IP);
} else {
N = new SDNode(Opcode, Ops);
N = new SDNode(Opcode, Ops, NumOps);
N->setValueTypes(VTs, ResultTys.size());
}
AllNodes.push_back(N);
return SDOperand(N, 0);
}
SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
std::vector<SDOperand> &Ops) {
return getNode(Opcode, VT, &Ops[0], Ops.size());
}
SDOperand SelectionDAG::getNode(unsigned Opcode,
std::vector<MVT::ValueType> &ResultTys,
std::vector<SDOperand> &Ops) {
return getNode(Opcode, ResultTys, &Ops[0], Ops.size());
}
MVT::ValueType *SelectionDAG::getNodeValueTypes(MVT::ValueType VT) {
return SDNode::getValueTypeList(VT);
}
@ -1843,45 +1839,32 @@ UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) {
SDOperand SelectionDAG::
UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) {
std::vector<SDOperand> Ops;
Ops.push_back(Op1);
Ops.push_back(Op2);
Ops.push_back(Op3);
return UpdateNodeOperands(N, Ops);
SDOperand Ops[] = { Op1, Op2, Op3 };
return UpdateNodeOperands(N, Ops, 3);
}
SDOperand SelectionDAG::
UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
SDOperand Op3, SDOperand Op4) {
std::vector<SDOperand> Ops;
Ops.push_back(Op1);
Ops.push_back(Op2);
Ops.push_back(Op3);
Ops.push_back(Op4);
return UpdateNodeOperands(N, Ops);
SDOperand Ops[] = { Op1, Op2, Op3, Op4 };
return UpdateNodeOperands(N, Ops, 4);
}
SDOperand SelectionDAG::
UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
SDOperand Op3, SDOperand Op4, SDOperand Op5) {
std::vector<SDOperand> Ops;
Ops.push_back(Op1);
Ops.push_back(Op2);
Ops.push_back(Op3);
Ops.push_back(Op4);
Ops.push_back(Op5);
return UpdateNodeOperands(N, Ops);
SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 };
return UpdateNodeOperands(N, Ops, 5);
}
SDOperand SelectionDAG::
UpdateNodeOperands(SDOperand InN, const std::vector<SDOperand> &Ops) {
UpdateNodeOperands(SDOperand InN, SDOperand *Ops, unsigned NumOps) {
SDNode *N = InN.Val;
assert(N->getNumOperands() == Ops.size() &&
assert(N->getNumOperands() == NumOps &&
"Update with wrong number of operands");
// Check to see if there is no change.
unsigned NumOps = Ops.size();
bool AnyChange = false;
for (unsigned i = 0; i != NumOps; ++i) {
if (Ops[i] != N->getOperand(i)) {
@ -1895,7 +1878,7 @@ UpdateNodeOperands(SDOperand InN, const std::vector<SDOperand> &Ops) {
// See if the modified node already exists.
void *InsertPos = 0;
if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
return SDOperand(Existing, InN.ResNo);
// Nope it doesn't. Remove the node from it's current place in the maps.