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Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit

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it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141419 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2011-10-07 22:08:37 +00:00
parent ce370cfd89
commit f1083d4139
2 changed files with 52 additions and 0 deletions
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49
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -5491,6 +5491,52 @@ ARMTargetLowering::EmitAtomicBinary64(MachineInstr *MI, MachineBasicBlock *BB,
return BB;
}
/// EmitBasePointerRecalculation - For functions using a base pointer, we
/// rematerialize it (via the frame pointer).
void ARMTargetLowering::
EmitBasePointerRecalculation(MachineInstr *MI, MachineBasicBlock *MBB,
MachineBasicBlock *DispatchBB) const {
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
const ARMBaseInstrInfo *AII = static_cast<const ARMBaseInstrInfo*>(TII);
MachineFunction &MF = *MI->getParent()->getParent();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
const ARMBaseRegisterInfo &RI = AII->getRegisterInfo();
if (!RI.hasBasePointer(MF)) return;
MachineBasicBlock::iterator MBBI = MI;
int32_t NumBytes = AFI->getFramePtrSpillOffset();
unsigned FramePtr = RI.getFrameRegister(MF);
assert(MF.getTarget().getFrameLowering()->hasFP(MF) &&
"Base pointer without frame pointer?");
if (AFI->isThumb2Function())
llvm::emitT2RegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
FramePtr, -NumBytes, ARMCC::AL, 0, *AII);
else if (AFI->isThumbFunction())
llvm::emitThumbRegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
FramePtr, -NumBytes, *AII, RI);
else
llvm::emitARMRegPlusImmediate(*MBB, MBBI, MI->getDebugLoc(), ARM::R6,
FramePtr, -NumBytes, ARMCC::AL, 0, *AII);
if (!RI.needsStackRealignment(MF)) return;
// If there's dynamic realignment, adjust for it.
MachineFrameInfo *MFI = MF.getFrameInfo();
unsigned MaxAlign = MFI->getMaxAlignment();
assert(!AFI->isThumb1OnlyFunction());
// Emit bic r6, r6, MaxAlign
unsigned bicOpc = AFI->isThumbFunction() ? ARM::t2BICri : ARM::BICri;
AddDefaultCC(
AddDefaultPred(
BuildMI(*MBB, MBBI, MI->getDebugLoc(), TII->get(bicOpc), ARM::R6)
.addReg(ARM::R6, RegState::Kill)
.addImm(MaxAlign - 1)));
}
/// SetupEntryBlockForSjLj - Insert code into the entry block that creates and
/// registers the function context.
void ARMTargetLowering::
@ -5525,6 +5571,8 @@ SetupEntryBlockForSjLj(MachineInstr *MI, MachineBasicBlock *MBB,
MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
MachineMemOperand::MOStore, 4, 4);
EmitBasePointerRecalculation(MI, MBB, DispatchBB);
// Load the address of the dispatch MBB into the jump buffer.
if (isThumb2) {
// Incoming value: jbuf
@ -5736,6 +5784,7 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
.addFrameIndex(FI)
.addImm(1)
.addMemOperand(FIMMOLd));
AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8))
.addReg(NewVReg1)
.addImm(LPadList.size()));

3
lib/Target/ARM/ARMISelLowering.h
View File

@ -512,6 +512,9 @@ namespace llvm {
bool signExtend,
ARMCC::CondCodes Cond) const;
void EmitBasePointerRecalculation(MachineInstr *MI, MachineBasicBlock *MBB,
MachineBasicBlock *DispatchBB) const;
void SetupEntryBlockForSjLj(MachineInstr *MI,
MachineBasicBlock *MBB,
MachineBasicBlock *DispatchBB, int FI) const;