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Add support for register masks to PBQP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153341 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -187,7 +187,7 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
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const RegSet &vregs) {
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typedef std::vector<const LiveInterval*> LIVector;
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ArrayRef<SlotIndex> regMaskSlots = lis->getRegMaskSlots();
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MachineRegisterInfo *mri = &mf->getRegInfo();
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const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo();
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@ -224,7 +224,9 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
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}
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}
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// Remove any physical registers which overlap.
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RegSet overlappingPRegs;
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// Record physical registers whose ranges overlap.
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for (RegSet::const_iterator pregItr = pregs.begin(),
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pregEnd = pregs.end();
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pregItr != pregEnd; ++pregItr) {
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@ -235,9 +237,41 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
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continue;
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}
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if (!vregLI->overlaps(*pregLI)) {
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continue;
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if (vregLI->overlaps(*pregLI))
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overlappingPRegs.insert(preg);
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}
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// Record any overlaps with regmask operands.
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BitVector regMaskOverlaps(tri->getNumRegs());
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for (ArrayRef<SlotIndex>::iterator rmItr = regMaskSlots.begin(),
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rmEnd = regMaskSlots.end();
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rmItr != rmEnd; ++rmItr) {
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SlotIndex rmIdx = *rmItr;
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if (vregLI->liveAt(rmIdx)) {
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MachineInstr *rmMI = lis->getInstructionFromIndex(rmIdx);
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const uint32_t* regMask = 0;
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for (MachineInstr::mop_iterator mopItr = rmMI->operands_begin(),
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mopEnd = rmMI->operands_end();
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mopItr != mopEnd; ++mopItr) {
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if (mopItr->isRegMask()) {
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regMask = mopItr->getRegMask();
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break;
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}
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}
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assert(regMask != 0 && "Couldn't find register mask.");
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regMaskOverlaps.setBitsNotInMask(regMask);
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}
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}
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for (unsigned preg = 0; preg < tri->getNumRegs(); ++preg) {
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if (regMaskOverlaps.test(preg))
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overlappingPRegs.insert(preg);
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}
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for (RegSet::const_iterator pregItr = overlappingPRegs.begin(),
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pregEnd = overlappingPRegs.end();
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pregItr != pregEnd; ++pregItr) {
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unsigned preg = *pregItr;
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// Remove the register from the allowed set.
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VRAllowed::iterator eraseItr =
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