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Added TargetRegisterInfo::getAllocatableClass.

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The ensures that virtual registers always belong to an allocatable class.
If your target attempts to create a vreg for an operand that has no
allocatable register subclass, you will crash quickly.

This ensures that targets define register classes as intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-05-03 01:14:37 +00:00
parent e8cd3f2491
commit f12f6dff97
4 changed files with 45 additions and 8 deletions
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29
lib/Target/TargetRegisterInfo.cpp
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@@ -46,6 +46,29 @@ void PrintReg::print(raw_ostream &OS) const {
}
}
/// getAllocatableClass - Return the maximal subclass of the given register
/// class that is alloctable, or NULL.
const TargetRegisterClass *
TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const {
if (!RC || RC->isAllocatable())
return RC;
const unsigned *SubClass = RC->getSubClassMask();
for (unsigned Base = 0, BaseE = getNumRegClasses();
Base < BaseE; Base += 32) {
unsigned Idx = Base;
for (unsigned Mask = *SubClass++; Mask; Mask >>= 1) {
unsigned Offset = CountTrailingZeros_32(Mask);
const TargetRegisterClass *SubRC = getRegClass(Idx + Offset);
if (SubRC->isAllocatable())
return SubRC;
Mask >>= Offset;
Idx += Offset + 1;
}
}
return NULL;
}
/// getMinimalPhysRegClass - Returns the Register Class of a physical
/// register of the given type, picking the most sub register class of
/// the right type that contains this physreg.
@@ -71,6 +94,7 @@ TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
/// registers for the specific register class.
static void getAllocatableSetForRC(const MachineFunction &MF,
const TargetRegisterClass *RC, BitVector &R){
assert(RC->isAllocatable() && "invalid for nonallocatable sets");
ArrayRef<uint16_t> Order = RC->getRawAllocationOrder(MF);
for (unsigned i = 0; i != Order.size(); ++i)
R.set(Order[i]);
@@ -80,7 +104,10 @@ BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
const TargetRegisterClass *RC) const {
BitVector Allocatable(getNumRegs());
if (RC) {
getAllocatableSetForRC(MF, RC, Allocatable);
// A register class with no allocatable subclass returns an empty set.
const TargetRegisterClass *SubClass = getAllocatableClass(RC);
if (SubClass)
getAllocatableSetForRC(MF, SubClass, Allocatable);
} else {
for (TargetRegisterInfo::regclass_iterator I = regclass_begin(),
E = regclass_end(); I != E; ++I)