From f18a36e3987814edf1c6a42f3ce28b1a51d9b4f1 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 3 Dec 2002 18:15:59 +0000 Subject: [PATCH] Fix the build git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4884 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/InstSelectSimple.cpp | 4 ++-- lib/Target/X86/X86ISelSimple.cpp | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index ac4084cbbb5..10fdf0f911d 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -641,10 +641,10 @@ ISel::visitCastInst (CastInst &CI) //the former is that the register allocator could use any register it wants, //but for now this obviously doesn't matter. :) - Type *targetType = CI.getType (); + const Type *targetType = CI.getType (); Value *operand = CI.getOperand (0); unsigned int operandReg = getReg (operand); - Type *sourceType = operand->getType (); + const Type *sourceType = operand->getType (); unsigned int destReg = getReg (CI); // cast to bool: diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index ac4084cbbb5..10fdf0f911d 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -641,10 +641,10 @@ ISel::visitCastInst (CastInst &CI) //the former is that the register allocator could use any register it wants, //but for now this obviously doesn't matter. :) - Type *targetType = CI.getType (); + const Type *targetType = CI.getType (); Value *operand = CI.getOperand (0); unsigned int operandReg = getReg (operand); - Type *sourceType = operand->getType (); + const Type *sourceType = operand->getType (); unsigned int destReg = getReg (CI); // cast to bool: