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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-21 19:32:16 +00:00
eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for the JIT path. Next up, remove the template cruft. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95131 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -329,14 +329,6 @@ public:
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}
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/// addCodeEmitter - This pass should be overridden by the target to add a
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/// code emitter, if supported. If this is not supported, 'true' should be
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/// returned.
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virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
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MachineCodeEmitter &) {
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return true;
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}
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/// addCodeEmitter - This pass should be overridden by the target to add a
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/// code emitter, if supported. If this is not supported, 'true' should be
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/// returned.
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@ -345,30 +337,6 @@ public:
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return true;
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}
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/// addSimpleCodeEmitter - This pass should be overridden by the target to add
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/// a code emitter (without setting flags), if supported. If this is not
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/// supported, 'true' should be returned.
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virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
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MachineCodeEmitter &) {
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return true;
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}
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/// addSimpleCodeEmitter - This pass should be overridden by the target to add
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/// a code emitter (without setting flags), if supported. If this is not
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/// supported, 'true' should be returned.
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virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
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JITCodeEmitter &) {
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return true;
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}
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/// addSimpleCodeEmitter - This pass should be overridden by the target to add
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/// a code emitter (without setting flags), if supported. If this is not
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/// supported, 'true' should be returned.
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virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
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ObjectCodeEmitter &) {
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return true;
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}
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/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
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/// on this target. User flag overrides.
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virtual bool getEnableTailMergeDefault() const { return true; }
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@ -166,28 +166,3 @@ bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
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PM.add(createARMObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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// Machine code emitter pass for ARM.
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PM.add(createARMCodeEmitterPass(*this, MCE));
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return false;
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}
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bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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// Machine code emitter pass for ARM.
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PM.add(createARMJITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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// Machine code emitter pass for ARM.
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PM.add(createARMObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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@ -58,15 +58,6 @@ public:
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JITCodeEmitter &MCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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};
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/// ARMTargetMachine - ARM target machine.
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@ -21,18 +21,12 @@ namespace llvm {
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class AlphaTargetMachine;
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class FunctionPass;
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class MachineCodeEmitter;
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class ObjectCodeEmitter;
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class formatted_raw_ostream;
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FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
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FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
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FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
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MachineCodeEmitter &MCE);
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FunctionPass *createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
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JITCodeEmitter &JCE);
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FunctionPass *createAlphaObjectCodeEmitterPass(AlphaTargetMachine &TM,
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ObjectCodeEmitter &OCE);
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FunctionPass *createAlphaLLRPPass(AlphaTargetMachine &tm);
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FunctionPass *createAlphaBranchSelectionPass();
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@ -17,9 +17,7 @@
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#include "AlphaRelocations.h"
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#include "Alpha.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/JITCodeEmitter.h"
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#include "llvm/CodeGen/ObjectCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/Passes.h"
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@ -81,19 +79,10 @@ namespace {
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/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
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/// code to the specified MCE object.
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FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
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MachineCodeEmitter &MCE) {
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return new Emitter<MachineCodeEmitter>(TM, MCE);
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}
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FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
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JITCodeEmitter &JCE) {
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return new Emitter<JITCodeEmitter>(TM, JCE);
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}
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FunctionPass *llvm::createAlphaObjectCodeEmitterPass(AlphaTargetMachine &TM,
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ObjectCodeEmitter &OCE) {
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return new Emitter<ObjectCodeEmitter>(TM, OCE);
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}
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template <class CodeEmitter>
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bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
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@ -53,37 +53,9 @@ bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
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PM.add(createAlphaLLRPPass(*this));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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PM.add(createAlphaCodeEmitterPass(*this, MCE));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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PM.add(createAlphaObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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return addCodeEmitter(PM, OptLevel, MCE);
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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return addCodeEmitter(PM, OptLevel, JCE);
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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return addCodeEmitter(PM, OptLevel, OCE);
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}
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@ -55,21 +55,8 @@ public:
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// Pass Pipeline Configuration
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virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &JCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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};
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} // end namespace llvm
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@ -170,30 +170,6 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
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return false;
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}
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bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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// Machine code emitter pass for PowerPC.
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PM.add(createPPCCodeEmitterPass(*this, MCE));
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return false;
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}
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bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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// Machine code emitter pass for PowerPC.
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PM.add(createPPCJITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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// Machine code emitter pass for PowerPC.
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PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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/// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are 4-byte,
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/// 8-byte, and target default. The CIE is hard-coded to indicate that the LSDA
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/// pointer in the FDE section is an "sdata4", and should be encoded as a 4-byte
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@ -78,15 +78,6 @@ public:
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JITCodeEmitter &JCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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virtual bool getEnableTailMergeDefault() const;
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};
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@ -206,27 +206,6 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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PM.add(createX86CodeEmitterPass(*this, MCE));
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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PM.add(createX86JITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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void X86TargetMachine::setCodeModelForStatic() {
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if (getCodeModel() != CodeModel::Default) return;
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@ -84,15 +84,6 @@ public:
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JITCodeEmitter &JCE);
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virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE);
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};
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/// X86_32TargetMachine - X86 32-bit target machine.
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