mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-25 10:27:04 +00:00
Fixed a bug concering LR spilling. Earlier, added spilled code was not inserted
into the instruction stream correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1294 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -42,7 +42,7 @@ PhyRegAlloc::PhyRegAlloc(Method *M,
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MRI( tm.getRegInfo() ),
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MRI( tm.getRegInfo() ),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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AddedInstrMap()
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AddedInstrMap()
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/*, PhiInstList()*/
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{
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{
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// **TODO: use an actual reserved color list
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// **TODO: use an actual reserved color list
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ReservedColorListType *RCL = new ReservedColorListType();
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ReservedColorListType *RCL = new ReservedColorListType();
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@@ -365,29 +365,6 @@ void PhyRegAlloc::updateMachineCode()
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if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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MRI.insertCallerSavingCode(MInst, *BBI, *this );
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MRI.insertCallerSavingCode(MInst, *BBI, *this );
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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if( AddedInstrMap[ MInst ] ) {
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deque<MachineInstr *> &IBef = (AddedInstrMap[MInst])->InstrnsBefore;
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if( ! IBef.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA )
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cerr << " PREPENDed instr: " << **AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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}
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// reset the stack offset for temporary variables since we may
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// reset the stack offset for temporary variables since we may
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// need that to spill
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// need that to spill
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@@ -395,6 +372,9 @@ void PhyRegAlloc::updateMachineCode()
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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// Now replace set the registers for operands in the machine instruction
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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MachineOperand& Op = MInst->getOperand(OpNum);
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MachineOperand& Op = MInst->getOperand(OpNum);
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@@ -451,6 +431,32 @@ void PhyRegAlloc::updateMachineCode()
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} // for each operand
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} // for each operand
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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if( AddedInstrMap[ MInst ] ) {
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deque<MachineInstr *> &IBef = (AddedInstrMap[MInst])->InstrnsBefore;
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if( ! IBef.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " PREPENDed instr: " << **AdIt << endl;
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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}
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// If there are instructions to be added *after* this machine
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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// instruction, add them now
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@@ -485,9 +491,11 @@ void PhyRegAlloc::updateMachineCode()
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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if(DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " APPENDed instr: " << **AdIt << endl;
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cerr << " APPENDed instr: " << **AdIt << endl;
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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++MInstIterator;
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}
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}
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@@ -578,7 +586,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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if( MIBef )
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if( MIBef )
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(AI->InstrnsBefore).push_back(MIBef);
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(AI->InstrnsBefore).push_back(MIBef);
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(AI->InstrnsBefore).push_back(AdIMid);
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(AI->InstrnsAfter).push_front(AdIMid);
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if( MIAft)
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if( MIAft)
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(AI->InstrnsAfter).push_front(MIAft);
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(AI->InstrnsAfter).push_front(MIAft);
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@@ -1055,6 +1063,10 @@ void PhyRegAlloc::allocateRegisters()
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// before we call constructLiveRanges (now done in the constructor of
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// before we call constructLiveRanges (now done in the constructor of
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// PhyRegAlloc class).
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// PhyRegAlloc class).
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cout << "\n\n ******** AFTER SCHEDULING **********";
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MachineCodeForMethod::get(Meth).dump();
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constructLiveRanges(); // create LR info
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constructLiveRanges(); // create LR info
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if( DEBUG_RA )
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if( DEBUG_RA )
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@@ -1115,6 +1127,10 @@ void PhyRegAlloc::allocateRegisters()
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MachineCodeForMethod::get(Meth).dump();
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MachineCodeForMethod::get(Meth).dump();
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printMachineCode(); // only for DEBUGGING
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printMachineCode(); // only for DEBUGGING
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}
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}
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// char ch;
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//cin >> ch;
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}
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}
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@@ -42,7 +42,7 @@ PhyRegAlloc::PhyRegAlloc(Method *M,
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MRI( tm.getRegInfo() ),
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MRI( tm.getRegInfo() ),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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AddedInstrMap()
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AddedInstrMap()
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/*, PhiInstList()*/
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{
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{
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// **TODO: use an actual reserved color list
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// **TODO: use an actual reserved color list
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ReservedColorListType *RCL = new ReservedColorListType();
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ReservedColorListType *RCL = new ReservedColorListType();
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@@ -365,29 +365,6 @@ void PhyRegAlloc::updateMachineCode()
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if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
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MRI.insertCallerSavingCode(MInst, *BBI, *this );
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MRI.insertCallerSavingCode(MInst, *BBI, *this );
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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if( AddedInstrMap[ MInst ] ) {
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deque<MachineInstr *> &IBef = (AddedInstrMap[MInst])->InstrnsBefore;
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if( ! IBef.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA )
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cerr << " PREPENDed instr: " << **AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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}
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// reset the stack offset for temporary variables since we may
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// reset the stack offset for temporary variables since we may
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// need that to spill
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// need that to spill
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@@ -395,6 +372,9 @@ void PhyRegAlloc::updateMachineCode()
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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// Now replace set the registers for operands in the machine instruction
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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MachineOperand& Op = MInst->getOperand(OpNum);
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MachineOperand& Op = MInst->getOperand(OpNum);
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@@ -451,6 +431,32 @@ void PhyRegAlloc::updateMachineCode()
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} // for each operand
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} // for each operand
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// If there are instructions to be added, *before* this machine
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// instruction, add them now.
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if( AddedInstrMap[ MInst ] ) {
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deque<MachineInstr *> &IBef = (AddedInstrMap[MInst])->InstrnsBefore;
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if( ! IBef.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " PREPENDed instr: " << **AdIt << endl;
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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}
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// If there are instructions to be added *after* this machine
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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// instruction, add them now
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@@ -485,9 +491,11 @@ void PhyRegAlloc::updateMachineCode()
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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if(DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " APPENDed instr: " << **AdIt << endl;
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cerr << " APPENDed instr: " << **AdIt << endl;
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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++MInstIterator;
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}
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}
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@@ -578,7 +586,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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if( MIBef )
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if( MIBef )
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(AI->InstrnsBefore).push_back(MIBef);
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(AI->InstrnsBefore).push_back(MIBef);
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(AI->InstrnsBefore).push_back(AdIMid);
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(AI->InstrnsAfter).push_front(AdIMid);
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if( MIAft)
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if( MIAft)
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(AI->InstrnsAfter).push_front(MIAft);
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(AI->InstrnsAfter).push_front(MIAft);
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@@ -1055,6 +1063,10 @@ void PhyRegAlloc::allocateRegisters()
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// before we call constructLiveRanges (now done in the constructor of
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// before we call constructLiveRanges (now done in the constructor of
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// PhyRegAlloc class).
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// PhyRegAlloc class).
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cout << "\n\n ******** AFTER SCHEDULING **********";
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MachineCodeForMethod::get(Meth).dump();
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constructLiveRanges(); // create LR info
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constructLiveRanges(); // create LR info
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if( DEBUG_RA )
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if( DEBUG_RA )
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@@ -1115,6 +1127,10 @@ void PhyRegAlloc::allocateRegisters()
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MachineCodeForMethod::get(Meth).dump();
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MachineCodeForMethod::get(Meth).dump();
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printMachineCode(); // only for DEBUGGING
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printMachineCode(); // only for DEBUGGING
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}
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}
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// char ch;
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//cin >> ch;
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}
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}
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