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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-23 00:20:25 +00:00
Move some rem transforms out of instcombine and into instsimplify.
This automagically provides a transform noticed by my super-optimizer as occurring quite often: "rem x, (select cond, x, 1)" -> 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130694 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -901,6 +901,111 @@ Value *llvm::SimplifyFDivInst(Value *Op0, Value *Op1, const TargetData *TD,
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return ::SimplifyFDivInst(Op0, Op1, TD, DT, RecursionLimit);
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}
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/// SimplifyRem - Given operands for an SRem or URem, see if we can
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/// fold the result. If not, this returns null.
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static Value *SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1,
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const TargetData *TD, const DominatorTree *DT,
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unsigned MaxRecurse) {
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if (Constant *C0 = dyn_cast<Constant>(Op0)) {
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if (Constant *C1 = dyn_cast<Constant>(Op1)) {
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Constant *Ops[] = { C0, C1 };
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return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, 2, TD);
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}
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}
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bool isSigned = Opcode == Instruction::SRem;
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// X % undef -> undef
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if (match(Op1, m_Undef()))
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return Op1;
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// undef % X -> 0
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if (match(Op0, m_Undef()))
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return Constant::getNullValue(Op0->getType());
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// 0 % X -> 0, we don't need to preserve faults!
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if (match(Op0, m_Zero()))
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return Op0;
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// X % 0 -> undef, we don't need to preserve faults!
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if (match(Op1, m_Zero()))
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return UndefValue::get(Op0->getType());
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// X % 1 -> 0
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if (match(Op1, m_One()))
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return Constant::getNullValue(Op0->getType());
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if (Op0->getType()->isIntegerTy(1))
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// It can't be remainder by zero, hence it must be remainder by one.
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return Constant::getNullValue(Op0->getType());
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// X % X -> 0
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if (Op0 == Op1)
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return Constant::getNullValue(Op0->getType());
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// If the operation is with the result of a select instruction, check whether
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// operating on either branch of the select always yields the same value.
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if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
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if (Value *V = ThreadBinOpOverSelect(Opcode, Op0, Op1, TD, DT, MaxRecurse))
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return V;
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// If the operation is with the result of a phi instruction, check whether
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// operating on all incoming values of the phi always yields the same value.
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if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
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if (Value *V = ThreadBinOpOverPHI(Opcode, Op0, Op1, TD, DT, MaxRecurse))
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return V;
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return 0;
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}
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/// SimplifySRemInst - Given operands for an SRem, see if we can
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/// fold the result. If not, this returns null.
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static Value *SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *TD,
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const DominatorTree *DT, unsigned MaxRecurse) {
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if (Value *V = SimplifyRem(Instruction::SRem, Op0, Op1, TD, DT, MaxRecurse))
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return V;
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return 0;
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}
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Value *llvm::SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *TD,
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const DominatorTree *DT) {
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return ::SimplifySRemInst(Op0, Op1, TD, DT, RecursionLimit);
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}
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/// SimplifyURemInst - Given operands for a URem, see if we can
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/// fold the result. If not, this returns null.
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static Value *SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *TD,
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const DominatorTree *DT, unsigned MaxRecurse) {
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if (Value *V = SimplifyRem(Instruction::URem, Op0, Op1, TD, DT, MaxRecurse))
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return V;
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return 0;
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}
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Value *llvm::SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *TD,
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const DominatorTree *DT) {
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return ::SimplifyURemInst(Op0, Op1, TD, DT, RecursionLimit);
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}
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static Value *SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *,
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const DominatorTree *, unsigned) {
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// undef % X -> undef (the undef could be a snan).
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if (match(Op0, m_Undef()))
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return Op0;
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// X % undef -> undef
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if (match(Op1, m_Undef()))
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return Op1;
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return 0;
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}
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Value *llvm::SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *TD,
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const DominatorTree *DT) {
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return ::SimplifyFRemInst(Op0, Op1, TD, DT, RecursionLimit);
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}
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/// SimplifyShift - Given operands for an Shl, LShr or AShr, see if we can
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/// fold the result. If not, this returns null.
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static Value *SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1,
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@@ -1994,6 +2099,9 @@ static Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
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case Instruction::SDiv: return SimplifySDivInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::UDiv: return SimplifyUDivInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::FDiv: return SimplifyFDivInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::SRem: return SimplifySRemInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::URem: return SimplifyURemInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::FRem: return SimplifyFRemInst(LHS, RHS, TD, DT, MaxRecurse);
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case Instruction::Shl:
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return SimplifyShlInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false,
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TD, DT, MaxRecurse);
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@@ -2088,6 +2196,15 @@ Value *llvm::SimplifyInstruction(Instruction *I, const TargetData *TD,
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case Instruction::FDiv:
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Result = SimplifyFDivInst(I->getOperand(0), I->getOperand(1), TD, DT);
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break;
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case Instruction::SRem:
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Result = SimplifySRemInst(I->getOperand(0), I->getOperand(1), TD, DT);
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break;
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case Instruction::URem:
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Result = SimplifyURemInst(I->getOperand(0), I->getOperand(1), TD, DT);
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break;
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case Instruction::FRem:
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Result = SimplifyFRemInst(I->getOperand(0), I->getOperand(1), TD, DT);
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break;
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case Instruction::Shl:
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Result = SimplifyShlInst(I->getOperand(0), I->getOperand(1),
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cast<BinaryOperator>(I)->hasNoSignedWrap(),
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