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https://github.com/c64scene-ar/llvm-6502.git
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Make TargetLowering::getPointerTy() taking DataLayout as an argument
Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241775 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -312,8 +312,9 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
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Constant *GAI = ConstantExpr::getGetElementPtr(
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Type::getInt8Ty(*DAG.getContext()), GA, Idx);
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SDValue CP = DAG.getConstantPool(GAI, MVT::i32);
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return DAG.getLoad(getPointerTy(), DL, DAG.getEntryNode(), CP,
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MachinePointerInfo(), false, false, false, 0);
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return DAG.getLoad(getPointerTy(DAG.getDataLayout()), DL,
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DAG.getEntryNode(), CP, MachinePointerInfo(), false,
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false, false, 0);
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}
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}
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@@ -321,11 +322,11 @@ SDValue XCoreTargetLowering::
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LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const
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{
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SDLoc DL(Op);
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auto PtrVT = getPointerTy(DAG.getDataLayout());
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const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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SDValue Result = DAG.getTargetBlockAddress(BA, getPointerTy());
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SDValue Result = DAG.getTargetBlockAddress(BA, PtrVT);
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return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result);
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return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, PtrVT, Result);
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}
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SDValue XCoreTargetLowering::
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@@ -378,9 +379,10 @@ SDValue XCoreTargetLowering::
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lowerLoadWordFromAlignedBasePlusOffset(SDLoc DL, SDValue Chain, SDValue Base,
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int64_t Offset, SelectionDAG &DAG) const
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{
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auto PtrVT = getPointerTy(DAG.getDataLayout());
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if ((Offset & 0x3) == 0) {
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return DAG.getLoad(getPointerTy(), DL, Chain, Base, MachinePointerInfo(),
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false, false, false, 0);
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return DAG.getLoad(PtrVT, DL, Chain, Base, MachinePointerInfo(), false,
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false, false, 0);
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}
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// Lower to pair of consecutive word aligned loads plus some bit shifting.
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int32_t HighOffset = RoundUpToAlignment(Offset, 4);
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@@ -401,11 +403,9 @@ lowerLoadWordFromAlignedBasePlusOffset(SDLoc DL, SDValue Chain, SDValue Base,
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SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, DL, MVT::i32);
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SDValue HighShift = DAG.getConstant((HighOffset - Offset) * 8, DL, MVT::i32);
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SDValue Low = DAG.getLoad(getPointerTy(), DL, Chain,
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LowAddr, MachinePointerInfo(),
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SDValue Low = DAG.getLoad(PtrVT, DL, Chain, LowAddr, MachinePointerInfo(),
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false, false, false, 0);
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SDValue High = DAG.getLoad(getPointerTy(), DL, Chain,
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HighAddr, MachinePointerInfo(),
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SDValue High = DAG.getLoad(PtrVT, DL, Chain, HighAddr, MachinePointerInfo(),
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false, false, false, 0);
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SDValue LowShifted = DAG.getNode(ISD::SRL, DL, MVT::i32, Low, LowShift);
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SDValue HighShifted = DAG.getNode(ISD::SHL, DL, MVT::i32, High, HighShift);
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@@ -495,10 +495,11 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
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Args.push_back(Entry);
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(DL).setChain(Chain)
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.setCallee(CallingConv::C, IntPtrTy,
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DAG.getExternalSymbol("__misaligned_load", getPointerTy()),
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std::move(Args), 0);
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CLI.setDebugLoc(DL).setChain(Chain).setCallee(
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CallingConv::C, IntPtrTy,
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DAG.getExternalSymbol("__misaligned_load",
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getPointerTy(DAG.getDataLayout())),
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std::move(Args), 0);
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std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
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SDValue Ops[] = { CallResult.first, CallResult.second };
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@@ -557,10 +558,11 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const
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Args.push_back(Entry);
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(dl).setChain(Chain)
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.setCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
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DAG.getExternalSymbol("__misaligned_store", getPointerTy()),
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std::move(Args), 0);
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CLI.setDebugLoc(dl).setChain(Chain).setCallee(
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CallingConv::C, Type::getVoidTy(*DAG.getContext()),
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DAG.getExternalSymbol("__misaligned_store",
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getPointerTy(DAG.getDataLayout())),
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std::move(Args), 0);
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std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
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return CallResult.second;
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@@ -833,9 +835,9 @@ LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const {
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XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
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int FI = XFI->createLRSpillSlot(MF);
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SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
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return DAG.getLoad(getPointerTy(), SDLoc(Op), DAG.getEntryNode(), FIN,
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MachinePointerInfo::getFixedStack(FI), false, false,
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false, 0);
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return DAG.getLoad(
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getPointerTy(DAG.getDataLayout()), SDLoc(Op), DAG.getEntryNode(), FIN,
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MachinePointerInfo::getFixedStack(FI), false, false, false, 0);
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}
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SDValue XCoreTargetLowering::
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@@ -979,11 +981,10 @@ LowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const {
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if (N->getMemoryVT() == MVT::i32) {
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if (N->getAlignment() < 4)
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report_fatal_error("atomic load must be aligned");
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return DAG.getLoad(getPointerTy(), SDLoc(Op), N->getChain(),
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N->getBasePtr(), N->getPointerInfo(),
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N->isVolatile(), N->isNonTemporal(),
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N->isInvariant(), N->getAlignment(),
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N->getAAInfo(), N->getRanges());
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return DAG.getLoad(getPointerTy(DAG.getDataLayout()), SDLoc(Op),
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N->getChain(), N->getBasePtr(), N->getPointerInfo(),
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N->isVolatile(), N->isNonTemporal(), N->isInvariant(),
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N->getAlignment(), N->getAAInfo(), N->getRanges());
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}
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if (N->getMemoryVT() == MVT::i16) {
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if (N->getAlignment() < 2)
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@@ -1150,9 +1151,10 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NumBytes = RetCCInfo.getNextStackOffset();
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auto PtrVT = getPointerTy(DAG.getDataLayout());
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Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, dl,
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getPointerTy(), true), dl);
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Chain = DAG.getCALLSEQ_START(Chain,
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DAG.getConstant(NumBytes, dl, PtrVT, true), dl);
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SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
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SmallVector<SDValue, 12> MemOpChains;
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@@ -1239,11 +1241,8 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
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InFlag = Chain.getValue(1);
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// Create the CALLSEQ_END node.
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Chain = DAG.getCALLSEQ_END(Chain,
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DAG.getConstant(NumBytes, dl, getPointerTy(),
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true),
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DAG.getConstant(0, dl, getPointerTy(), true),
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InFlag, dl);
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Chain = DAG.getCALLSEQ_END(Chain, DAG.getConstant(NumBytes, dl, PtrVT, true),
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DAG.getConstant(0, dl, PtrVT, true), InFlag, dl);
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InFlag = Chain.getValue(1);
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// Handle result values, copying them out of physregs into vregs that we
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