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Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI"
instruction format that already takes care of setting this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85280 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1131,7 +1131,6 @@ def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, "rsc", "\t$dst, $a, $b",
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[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{20} = 0;
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let Inst{25} = 1;
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}
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def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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@ -1140,7 +1139,6 @@ def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{4} = 1;
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let Inst{7} = 0;
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let Inst{20} = 0;
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let Inst{25} = 0;
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}
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}
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