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Add support for the inline asm constraint 'K'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156282 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3041,6 +3041,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
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break;
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case 'I': // signed 16 bit immediate
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case 'J': // integer zero
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case 'K': // unsigned 16 bit immediate
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if (isa<ConstantInt>(CallOperandVal))
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weight = CW_Constant;
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break;
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@ -3113,6 +3114,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
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}
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}
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return;
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case 'K': // unsigned 16 bit immediate
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
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EVT Type = Op.getValueType();
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uint64_t Val = (uint64_t)C->getZExtValue();
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if (isUInt<16>(Val)) {
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Result = DAG.getTargetConstant(Val, Type);
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break;
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}
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}
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return;
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}
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if (Result.getNode()) {
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16
test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll
Normal file
16
test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll
Normal file
@ -0,0 +1,16 @@
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;
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;This is a negative test. The constant value given for the constraint (K)
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;is greater than 16 bits (0x00100000).
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;
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; RUN: not llc -march=mipsel < %s 2> %t
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; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
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define i32 @main() nounwind {
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entry:
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;CHECK-ERRORS: error: invalid operand for inline asm constraint 'K'
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tail call i32 asm "addu $0,$1,$2", "=r,r,K"(i32 1024, i32 1048576) nounwind
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ret i32 0
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}
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@ -21,6 +21,12 @@ entry:
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; CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
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; Now K with 64
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; CHECK: #APP
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; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64
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; CHECK: #NO_APP
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tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
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ret i32 0
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}
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