6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-14 06:37:33 +00:00
Code Issues Projects Releases Wiki Activity

Implement the inline asm 'A' constraint. This implements PR825 and

Browse Source 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-07-11 02:54:03 +00:00
parent fbc98917b1
commit f4dff84c86
2 changed files with 17 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/Target/X86/X86ISelLowering.cpp
View File

@ -4135,6 +4135,16 @@ SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N,
// X86 Inline Assembly Support
//===----------------------------------------------------------------------===//
/// getConstraintType - Given a constraint letter, return the type of
/// constraint it is for this target.
X86TargetLowering::ConstraintType
X86TargetLowering::getConstraintType(char ConstraintLetter) const {
switch (ConstraintLetter) {
case 'A': return C_RegisterClass;
default: return TargetLowering::getConstraintType(ConstraintLetter);
}
}
std::vector<unsigned> X86TargetLowering::
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const {
@ -4142,7 +4152,11 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
// FIXME: not handling fp-stack yet!
// FIXME: not handling MMX registers yet ('y' constraint).
switch (Constraint[0]) { // GCC X86 Constraint Letters
default: break; // Unknown constriant letter
default: break; // Unknown constraint letter
case 'A': // EAX/EDX
if (VT == MVT::i32 || VT == MVT::i64)
return make_vector<unsigned>(X86::EAX, X86::EDX, 0);
break;
case 'r': // GENERAL_REGS
case 'R': // LEGACY_REGS
if (VT == MVT::i32)

2
lib/Target/X86/X86ISelLowering.h
View File

@ -310,6 +310,8 @@ namespace llvm {
SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);
ConstraintType getConstraintType(char ConstraintLetter) const;
std::vector<unsigned>
getRegClassForInlineAsmConstraint(const std::string &Constraint,
MVT::ValueType VT) const;